]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: mediatek: mt7988: add switch node
authorFrank Wunderlich <frank-w@public-files.de>
Wed, 9 Jul 2025 11:09:46 +0000 (13:09 +0200)
committerMatthias Brugger <matthias.bgg@gmail.com>
Tue, 9 Sep 2025 12:52:30 +0000 (14:52 +0200)
Add mt7988 builtin mt753x switch nodes.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250709111147.11843-11-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt7988a.dtsi

index 897b5a82b53ea5b24ec7b8e15a43b007c29be8a0..366203a72d6d20f754e18eb985eda009c413ce79 100644 (file)
                        #reset-cells = <1>;
                };
 
+               switch: switch@15020000 {
+                       compatible = "mediatek,mt7988-switch";
+                       reg = <0 0x15020000 0 0x8000>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+                       interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
+                       resets = <&ethwarp MT7988_ETHWARP_RST_SWITCH>;
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               gsw_port0: port@0 {
+                                       reg = <0>;
+                                       phy-handle = <&gsw_phy0>;
+                                       phy-mode = "internal";
+                               };
+
+                               gsw_port1: port@1 {
+                                       reg = <1>;
+                                       phy-handle = <&gsw_phy1>;
+                                       phy-mode = "internal";
+                               };
+
+                               gsw_port2: port@2 {
+                                       reg = <2>;
+                                       phy-handle = <&gsw_phy2>;
+                                       phy-mode = "internal";
+                               };
+
+                               gsw_port3: port@3 {
+                                       reg = <3>;
+                                       phy-handle = <&gsw_phy3>;
+                                       phy-mode = "internal";
+                               };
+
+                               port@6 {
+                                       reg = <6>;
+                                       ethernet = <&gmac0>;
+                                       phy-mode = "internal";
+
+                                       fixed-link {
+                                               speed = <10000>;
+                                               full-duplex;
+                                               pause;
+                                       };
+                               };
+                       };
+
+                       mdio {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               mediatek,pio = <&pio>;
+
+                               gsw_phy0: ethernet-phy@0 {
+                                       compatible = "ethernet-phy-ieee802.3-c22";
+                                       reg = <0>;
+                                       interrupts = <0>;
+                                       nvmem-cells = <&phy_calibration_p0>;
+                                       nvmem-cell-names = "phy-cal-data";
+
+                                       leds {
+                                               #address-cells = <1>;
+                                               #size-cells = <0>;
+
+                                               gsw_phy0_led0: led@0 {
+                                                       reg = <0>;
+                                                       status = "disabled";
+                                               };
+
+                                               gsw_phy0_led1: led@1 {
+                                                       reg = <1>;
+                                                       status = "disabled";
+                                               };
+                                       };
+                               };
+
+                               gsw_phy1: ethernet-phy@1 {
+                                       compatible = "ethernet-phy-ieee802.3-c22";
+                                       reg = <1>;
+                                       interrupts = <1>;
+                                       nvmem-cells = <&phy_calibration_p1>;
+                                       nvmem-cell-names = "phy-cal-data";
+
+                                       leds {
+                                               #address-cells = <1>;
+                                               #size-cells = <0>;
+
+                                               gsw_phy1_led0: led@0 {
+                                                       reg = <0>;
+                                                       status = "disabled";
+                                               };
+
+                                               gsw_phy1_led1: led@1 {
+                                                       reg = <1>;
+                                                       status = "disabled";
+                                               };
+                                       };
+                               };
+
+                               gsw_phy2: ethernet-phy@2 {
+                                       compatible = "ethernet-phy-ieee802.3-c22";
+                                       reg = <2>;
+                                       interrupts = <2>;
+                                       nvmem-cells = <&phy_calibration_p2>;
+                                       nvmem-cell-names = "phy-cal-data";
+
+                                       leds {
+                                               #address-cells = <1>;
+                                               #size-cells = <0>;
+
+                                               gsw_phy2_led0: led@0 {
+                                                       reg = <0>;
+                                                       status = "disabled";
+                                               };
+
+                                               gsw_phy2_led1: led@1 {
+                                                       reg = <1>;
+                                                       status = "disabled";
+                                               };
+                                       };
+                               };
+
+                               gsw_phy3: ethernet-phy@3 {
+                                       compatible = "ethernet-phy-ieee802.3-c22";
+                                       reg = <3>;
+                                       interrupts = <3>;
+                                       nvmem-cells = <&phy_calibration_p3>;
+                                       nvmem-cell-names = "phy-cal-data";
+
+                                       leds {
+                                               #address-cells = <1>;
+                                               #size-cells = <0>;
+
+                                               gsw_phy3_led0: led@0 {
+                                                       reg = <0>;
+                                                       status = "disabled";
+                                               };
+
+                                               gsw_phy3_led1: led@1 {
+                                                       reg = <1>;
+                                                       status = "disabled";
+                                               };
+                                       };
+                               };
+                       };
+               };
+
                ethwarp: clock-controller@15031000 {
                        compatible = "mediatek,mt7988-ethwarp";
                        reg = <0 0x15031000 0 0x1000>;