net: stmmac: fix csr_clk can't be zero issue

[ Upstream commit 5e7f7fc538d894b2d9aa41876b8dcf35f5fe11e6 ]

The specific clk_csr value can be zero, and
stmmac_clk is necessary for MDC clock which can be set dynamically.
So, change the condition from plat->clk_csr to plat->stmmac_clk to
fix clk_csr can't be zero issue.

Fixes: cd7201f477b9 ("stmmac: MDC clock dynamically based on the csr clock input")
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 8cebc44108b2d1f0dfc3484fe98e852f86071d3c..635d88d826100ccf607d000290017d0810da4a06 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -4380,10 +4380,10 @@ int stmmac_dvr_probe(struct device *device,
         * set the MDC clock dynamically according to the csr actual
         * clock input.
         */
-       if (!priv->plat->clk_csr)
-               stmmac_clk_csr_set(priv);
-       else
+       if (priv->plat->clk_csr >= 0)
                priv->clk_csr = priv->plat->clk_csr;
+       else
+               stmmac_clk_csr_set(priv);
 
        stmmac_check_pcs_mode(priv);
 

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 3031f2bf15d6592ea5cd3f749db01ab189bc43ea..f45bfbef97d07514d2372ed0e064f3a8ce98b009 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -408,7 +408,10 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
        /* Default to phy auto-detection */
        plat->phy_addr = -1;
 
-       /* Get clk_csr from device tree */
+       /* Default to get clk_csr from stmmac_clk_crs_set(),
+        * or get clk_csr from device tree.
+        */
+       plat->clk_csr = -1;
        of_property_read_u32(np, "clk_csr", &plat->clk_csr);
 
        /* "snps,phy-addr" is not a standard property. Mark it as deprecated