]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
Revert "drm/amdgpu/gfx9: put queue resets behind a debug option"
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Oct 2024 19:55:10 +0000 (15:55 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 22 Oct 2024 21:50:11 +0000 (17:50 -0400)
This reverts commit 7c1a2d8aba6cadde0cc542b2d805edc0be667e79.

Extended validation has completed successfully, so enable
these features by default.

Acked-by: Jiadong Zhu <Jiadong.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Jonathan Kim <jonathan.kim@amd.com>
Cc: Jiadong Zhu <Jiadong.Zhu@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

index e216f49283e49e25c573339fe8095f10c5e582cf..cc66ebb7bae15fee418a0ba723ea7191861ac076 100644 (file)
@@ -1131,10 +1131,6 @@ uint64_t kgd_gfx_v9_hqd_get_pq_addr(struct amdgpu_device *adev,
        uint32_t low, high;
        uint64_t queue_addr = 0;
 
-       if (!adev->debug_exp_resets &&
-           !adev->gfx.num_gfx_rings)
-               return 0;
-
        kgd_gfx_v9_acquire_queue(adev, pipe_id, queue_id, inst);
        amdgpu_gfx_rlc_enter_safe_mode(adev, inst);
 
index be320d753507ca8862478178bb27d16c159ebf89..b4c4b99162896b20d7dbdd0b6f74a2081c175b5c 100644 (file)
@@ -7257,10 +7257,6 @@ static int gfx_v9_0_reset_kcq(struct amdgpu_ring *ring,
        unsigned long flags;
        int i, r;
 
-       if (!adev->debug_exp_resets &&
-           !adev->gfx.num_gfx_rings)
-               return -EINVAL;
-
        if (amdgpu_sriov_vf(adev))
                return -EINVAL;
 
index 33371caed539ae3086c3ce74dd3e37625509e004..016290f005922d352662b8fcf98caef3d105d5a6 100644 (file)
@@ -3054,9 +3054,6 @@ static void gfx_v9_4_3_ring_soft_recovery(struct amdgpu_ring *ring,
        struct amdgpu_device *adev = ring->adev;
        uint32_t value = 0;
 
-       if (!adev->debug_exp_resets)
-               return;
-
        value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03);
        value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01);
        value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1);
@@ -3572,9 +3569,6 @@ static int gfx_v9_4_3_reset_kcq(struct amdgpu_ring *ring,
        unsigned long flags;
        int r;
 
-       if (!adev->debug_exp_resets)
-               return -EINVAL;
-
        if (amdgpu_sriov_vf(adev))
                return -EINVAL;