[RISC-V] Drop scan-tests of marginal value

gcc/testsuite
	* gcc.target/riscv/rvv/vsetvl/avl_single-37.c: Drop unnecessary output
	test(s).
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c: Likewise.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c: Likewise.

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c
index 9bade063f17ec8827ccbaae3aa5cda4de9b4a6c6..d3d0c5a70332ddaca7f7cf29c4815d77ddeaea4f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c
@@ -26,4 +26,3 @@ void f (int8_t * restrict in, int8_t * restrict out, int n, int m, unsigned cond
 
 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */
 /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
-/* { dg-final { scan-assembler-times {\.L[0-9]+\:\s+addi\s+\s*[a-x0-9]+,\s*[a-x0-9]+,\s*[0-9]00\s+addi\s+\s*[a-x0-9]+,\s*[a-x0-9]+,\s*[0-9]00\s+addi\s+\s*[a-x0-9]+,\s*[a-x0-9]+,\s*[0-9]00\s+add\s+\s*[a-x0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+\s+\.L[0-9]+\:} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c
index 723a1c6c9fcbfac52e40612498785e391263590c..7bbd802fa3d389a31d57e558b76e9c82f6497a76 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c
@@ -34,4 +34,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,\.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c
index f2dab3ada558c59ed44c5e8e810807352d454b04..efa6216f2e98a732c0a2b5a6ead11a44aa7362d2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c
@@ -34,4 +34,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c
index 94fb31fcfc65d9371a7f012a56471a6415293708..459b3f048d2d62d2dc2764786325781c69dfafb8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c
@@ -34,4 +34,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c
index 1805bcd32203612f7f4338f7313c9104a3c1b58f..7cad98461a3acc2e05457b4a5ea78eb9a1f509d0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c
@@ -34,4 +34,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c
index 68d0af739139b06be00193d7ca047f088011eaa1..ada64d973c701f890c0ca26b881badb50332a3ed 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c
@@ -34,4 +34,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c
index 89c785ec4719930c30753fb60b4ca5a166f3c49a..a7b40e69f5b14d43437c2c286d951493934ab54a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c
@@ -214,4 +214,3 @@ void f7 (void * restrict in, void * restrict out, int n, int cond)
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s+\.L[0-9]+\:\s+vlm\.v\s+v[0-9]+,0\([a-x0-9]+\)} 7 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c
index af4ba3cc0a7bf2e3321f734bfa48af449fdffa85..2439c5e270ac772a81616e971be48ae04a2f1b55 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c
@@ -37,4 +37,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c
index a081dda8b370925e21105ca31e7a7ba7b9a40da5..3f30b151db31c23082da35025097ccdd13162266 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c
@@ -37,4 +37,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c
index e27c76c9f188078fc1b7644df49efa0d6ec9888e..9492510802c43ddce1005592de7a6bc4fc316458 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c
@@ -37,4 +37,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c
index 16c8fd9e0e958562a25c8ad88ca021736d7501c6..00b5ac355f1c9a6fb62216bbc72a0ca05e96651e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c
@@ -37,4 +37,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c
index af0df897290c02f9f14da33462923ee6293cda65..7f7c520ebad94be0a07e2f51c4b05381803b5bf5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c
@@ -37,4 +37,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"   } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"   } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c
index 69c642340b694bf094e353bf27151c9fe22e6d8f..d5c74af9e43e8c37f01943645f5210829f4145cb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c
@@ -34,4 +34,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g"  no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c
index 78d8e9de00cad18e1ca72e00db21ba1ed3c4a54b..2d93e2832c530fae7c9fae09b897671bbfe39695 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c
@@ -37,4 +37,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c
index 993e420a87b527efb5be48bb3fa383231d3e5890..ce187afb3c06811dd49fafb9a844c17fd3cdc337 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c
@@ -37,4 +37,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c
index d1547c9c106ba3a2f01ba2a2af68489b71cc2f5a..d79be09baa57699f4eafebdd47d13fe15571c766 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c
@@ -37,4 +37,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c
index 836619f93da2a20cf85b1eb49d8ff2620218335e..6d2cf5b30fab46f3044f0165cce96993e67ff55e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c
@@ -37,4 +37,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c
index e61bb9cc1639970825dc31f185bb549e1cad97ef..b2e1d8826b7b047c322a86a01a8b3c08fb667c6c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c
@@ -37,4 +37,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c
index b4b4c66059c10a981492f4c68c75c4f00f2cd898..af8f7623d938839a5c1b5161d118a1d15c3edee1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c
@@ -37,4 +37,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c
index 0910b0cdabd88e29b2ed32354c44a84c395c9c77..f47a332d8362de9f8e556b8611fb136f083a325e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c
@@ -37,4 +37,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c
index 661e5c0c23cc597cea847ae9c73af4c5703586f8..fc9e8d52c5e7b0c74820d6076df7c29015e25a84 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c
@@ -37,4 +37,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c
index 8cbbfaba8d0919ee49ee378547370bdcaf15c0b3..8f91736a874370a81616a193f83ea23012038e5d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c
@@ -234,4 +234,3 @@ void f7 (void * restrict in, void * restrict out, int n, int cond)
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vlm\.v\s*v[0-9]+,0\([a-x0-9]+\)} 7 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto"  } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c
index 10df345c441a024361c00cf70898a2221b3db15d..82a40c81194cdfefa6765a930d0b498579d4b234 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c
@@ -34,4 +34,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g"   no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g"   no-opts "-flto" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c
index fb7197a0a780312645e6387a03285eb5dd6e00a6..9069fc5525b5bfcff5cc294527f59e288b028b37 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c
@@ -34,4 +34,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g"  no-opts "-flto"  } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g"  no-opts "-flto"  } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c
index 66833743627ce7bad2289690ddf5b225633acc8b..e736e1c666709397ef59e259699109402e274a5d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c
@@ -34,4 +34,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c
index 7066d77e53abc7408a29cccb1135fdef340d2519..1b09a23a1257e5634097fd5b285f649756fc63dc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c
@@ -34,4 +34,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c
index 452890090ba4fd0ab569b841100ec2be8128c89a..1f75a6ab4037b1ab00481b8a5e74a04dd805255b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c
@@ -34,4 +34,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c
index 4d1acf9d9a589646fedbbd99fd71569bd548aa2b..00aba0ac843b7811d02e2ec58d2ee8f0d0c8773d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c
@@ -34,4 +34,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c
index 5bfc6593e9b57b18939b23f3f14240972ce0e8b7..59feeef4e04158a6eec5fa0c3e64416649d963d9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c
@@ -34,4 +34,3 @@ void f (void * restrict in, void * restrict out, int n, int cond)
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
-/* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */