--- /dev/null
+From 68fe55680d0f3342969f49412fceabb90bdfadba Mon Sep 17 00:00:00 2001
+From: "Maciej W. Rozycki" <macro@linux-mips.org>
+Date: Sun, 30 Jul 2017 21:28:15 +0100
+Subject: MIPS: DEC: Fix an int-handler.S CPU_DADDI_WORKAROUNDS regression
+
+From: Maciej W. Rozycki <macro@linux-mips.org>
+
+commit 68fe55680d0f3342969f49412fceabb90bdfadba upstream.
+
+Fix a commit 3021773c7c3e ("MIPS: DEC: Avoid la pseudo-instruction in
+delay slots") regression and remove assembly errors:
+
+arch/mips/dec/int-handler.S: Assembler messages:
+arch/mips/dec/int-handler.S:162: Error: Macro used $at after ".set noat"
+arch/mips/dec/int-handler.S:163: Error: Macro used $at after ".set noat"
+arch/mips/dec/int-handler.S:229: Error: Macro used $at after ".set noat"
+arch/mips/dec/int-handler.S:230: Error: Macro used $at after ".set noat"
+
+triggering with with the CPU_DADDI_WORKAROUNDS option set and the DADDIU
+instruction. This is because with that option in place the instruction
+becomes a macro, which expands to an LI/DADDU (or actually ADDIU/DADDU)
+sequence that uses $at as a temporary register.
+
+With CPU_DADDI_WORKAROUNDS we only support `-msym32' compilation though,
+and this is already enforced in arch/mips/Makefile, so choose the 32-bit
+expansion variant for the supported configurations and then replace the
+64-bit variant with #error just in case.
+
+Fixes: 3021773c7c3e ("MIPS: DEC: Avoid la pseudo-instruction in delay slots")
+Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
+Cc: linux-mips@linux-mips.org
+Patchwork: https://patchwork.linux-mips.org/patch/16893/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/mips/dec/int-handler.S | 34 ++++++----------------------------
+ 1 file changed, 6 insertions(+), 28 deletions(-)
+
+--- a/arch/mips/dec/int-handler.S
++++ b/arch/mips/dec/int-handler.S
+@@ -147,23 +147,12 @@
+ * Find irq with highest priority
+ */
+ # open coded PTR_LA t1, cpu_mask_nr_tbl
+-#if (_MIPS_SZPTR == 32)
++#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
+ # open coded la t1, cpu_mask_nr_tbl
+ lui t1, %hi(cpu_mask_nr_tbl)
+ addiu t1, %lo(cpu_mask_nr_tbl)
+-
+-#endif
+-#if (_MIPS_SZPTR == 64)
+- # open coded dla t1, cpu_mask_nr_tbl
+- .set push
+- .set noat
+- lui t1, %highest(cpu_mask_nr_tbl)
+- lui AT, %hi(cpu_mask_nr_tbl)
+- daddiu t1, t1, %higher(cpu_mask_nr_tbl)
+- daddiu AT, AT, %lo(cpu_mask_nr_tbl)
+- dsll t1, 32
+- daddu t1, t1, AT
+- .set pop
++#else
++#error GCC `-msym32' option required for 64-bit DECstation builds
+ #endif
+ 1: lw t2,(t1)
+ nop
+@@ -214,23 +203,12 @@
+ * Find irq with highest priority
+ */
+ # open coded PTR_LA t1,asic_mask_nr_tbl
+-#if (_MIPS_SZPTR == 32)
++#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
+ # open coded la t1, asic_mask_nr_tbl
+ lui t1, %hi(asic_mask_nr_tbl)
+ addiu t1, %lo(asic_mask_nr_tbl)
+-
+-#endif
+-#if (_MIPS_SZPTR == 64)
+- # open coded dla t1, asic_mask_nr_tbl
+- .set push
+- .set noat
+- lui t1, %highest(asic_mask_nr_tbl)
+- lui AT, %hi(asic_mask_nr_tbl)
+- daddiu t1, t1, %higher(asic_mask_nr_tbl)
+- daddiu AT, AT, %lo(asic_mask_nr_tbl)
+- dsll t1, 32
+- daddu t1, t1, AT
+- .set pop
++#else
++#error GCC `-msym32' option required for 64-bit DECstation builds
+ #endif
+ 2: lw t2,(t1)
+ nop
--- /dev/null
+From 81a67e52763d1db6b3200c648d1efa16daddc536 Mon Sep 17 00:00:00 2001
+From: "Steven J. Hill" <Steven.Hill@cavium.com>
+Date: Wed, 2 Aug 2017 12:39:28 -0500
+Subject: MIPS: Octeon: Fix broken EDAC driver.
+
+From: Steven J. Hill <Steven.Hill@cavium.com>
+
+commit 81a67e52763d1db6b3200c648d1efa16daddc536 upstream.
+
+Commit "MIPS: Octeon: Remove unused L2C types and macros." broke the
+the EDAC driver. Bring back 'cvmx-l2d-defs.h' file and the missing
+types for L2C. Fixes: 15f6847923a8 ("MIPS: Octeon: Remove unused L2C
+types and macros.")
+
+Fixes: 15f6847923a8 ("MIPS: Octeon: Remove unused L2C types and macros.")
+Signed-off-by: Steven J. Hill <steven.hill@cavium.com>
+Reviewed-by: James Hogan <james.hogan@imgtec.com>
+Cc: linux-mips@linux-mips.org
+Patchwork: https://patchwork.linux-mips.org/patch/16906/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/mips/include/asm/octeon/cvmx-l2c-defs.h | 37 ++++++++++++++++
+ arch/mips/include/asm/octeon/cvmx-l2d-defs.h | 60 +++++++++++++++++++++++++++
+ arch/mips/include/asm/octeon/cvmx.h | 1
+ 3 files changed, 97 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/include/asm/octeon/cvmx-l2c-defs.h
++++ b/arch/mips/include/asm/octeon/cvmx-l2c-defs.h
+@@ -33,6 +33,10 @@
+ #define CVMX_L2C_DBG (CVMX_ADD_IO_SEG(0x0001180080000030ull))
+ #define CVMX_L2C_CFG (CVMX_ADD_IO_SEG(0x0001180080000000ull))
+ #define CVMX_L2C_CTL (CVMX_ADD_IO_SEG(0x0001180080800000ull))
++#define CVMX_L2C_ERR_TDTX(block_id) \
++ (CVMX_ADD_IO_SEG(0x0001180080A007E0ull) + ((block_id) & 3) * 0x40000ull)
++#define CVMX_L2C_ERR_TTGX(block_id) \
++ (CVMX_ADD_IO_SEG(0x0001180080A007E8ull) + ((block_id) & 3) * 0x40000ull)
+ #define CVMX_L2C_LCKBASE (CVMX_ADD_IO_SEG(0x0001180080000058ull))
+ #define CVMX_L2C_LCKOFF (CVMX_ADD_IO_SEG(0x0001180080000060ull))
+ #define CVMX_L2C_PFCTL (CVMX_ADD_IO_SEG(0x0001180080000090ull))
+@@ -66,9 +70,40 @@
+ ((offset) & 1) * 8)
+ #define CVMX_L2C_WPAR_PPX(offset) (CVMX_ADD_IO_SEG(0x0001180080840000ull) + \
+ ((offset) & 31) * 8)
+-#define CVMX_L2D_FUS3 (CVMX_ADD_IO_SEG(0x00011800800007B8ull))
+
+
++union cvmx_l2c_err_tdtx {
++ uint64_t u64;
++ struct cvmx_l2c_err_tdtx_s {
++ __BITFIELD_FIELD(uint64_t dbe:1,
++ __BITFIELD_FIELD(uint64_t sbe:1,
++ __BITFIELD_FIELD(uint64_t vdbe:1,
++ __BITFIELD_FIELD(uint64_t vsbe:1,
++ __BITFIELD_FIELD(uint64_t syn:10,
++ __BITFIELD_FIELD(uint64_t reserved_22_49:28,
++ __BITFIELD_FIELD(uint64_t wayidx:18,
++ __BITFIELD_FIELD(uint64_t reserved_2_3:2,
++ __BITFIELD_FIELD(uint64_t type:2,
++ ;)))))))))
++ } s;
++};
++
++union cvmx_l2c_err_ttgx {
++ uint64_t u64;
++ struct cvmx_l2c_err_ttgx_s {
++ __BITFIELD_FIELD(uint64_t dbe:1,
++ __BITFIELD_FIELD(uint64_t sbe:1,
++ __BITFIELD_FIELD(uint64_t noway:1,
++ __BITFIELD_FIELD(uint64_t reserved_56_60:5,
++ __BITFIELD_FIELD(uint64_t syn:6,
++ __BITFIELD_FIELD(uint64_t reserved_22_49:28,
++ __BITFIELD_FIELD(uint64_t wayidx:15,
++ __BITFIELD_FIELD(uint64_t reserved_2_6:5,
++ __BITFIELD_FIELD(uint64_t type:2,
++ ;)))))))))
++ } s;
++};
++
+ union cvmx_l2c_cfg {
+ uint64_t u64;
+ struct cvmx_l2c_cfg_s {
+--- /dev/null
++++ b/arch/mips/include/asm/octeon/cvmx-l2d-defs.h
+@@ -0,0 +1,60 @@
++/***********************license start***************
++ * Author: Cavium Networks
++ *
++ * Contact: support@caviumnetworks.com
++ * This file is part of the OCTEON SDK
++ *
++ * Copyright (c) 2003-2017 Cavium, Inc.
++ *
++ * This file is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License, Version 2, as
++ * published by the Free Software Foundation.
++ *
++ * This file is distributed in the hope that it will be useful, but
++ * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
++ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
++ * NONINFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this file; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
++ * or visit http://www.gnu.org/licenses/.
++ *
++ * This file may also be available under a different license from Cavium.
++ * Contact Cavium Networks for more information
++ ***********************license end**************************************/
++
++#ifndef __CVMX_L2D_DEFS_H__
++#define __CVMX_L2D_DEFS_H__
++
++#define CVMX_L2D_ERR (CVMX_ADD_IO_SEG(0x0001180080000010ull))
++#define CVMX_L2D_FUS3 (CVMX_ADD_IO_SEG(0x00011800800007B8ull))
++
++
++union cvmx_l2d_err {
++ uint64_t u64;
++ struct cvmx_l2d_err_s {
++ __BITFIELD_FIELD(uint64_t reserved_6_63:58,
++ __BITFIELD_FIELD(uint64_t bmhclsel:1,
++ __BITFIELD_FIELD(uint64_t ded_err:1,
++ __BITFIELD_FIELD(uint64_t sec_err:1,
++ __BITFIELD_FIELD(uint64_t ded_intena:1,
++ __BITFIELD_FIELD(uint64_t sec_intena:1,
++ __BITFIELD_FIELD(uint64_t ecc_ena:1,
++ ;)))))))
++ } s;
++};
++
++union cvmx_l2d_fus3 {
++ uint64_t u64;
++ struct cvmx_l2d_fus3_s {
++ __BITFIELD_FIELD(uint64_t reserved_40_63:24,
++ __BITFIELD_FIELD(uint64_t ema_ctl:3,
++ __BITFIELD_FIELD(uint64_t reserved_34_36:3,
++ __BITFIELD_FIELD(uint64_t q3fus:34,
++ ;))))
++ } s;
++};
++
++#endif
+--- a/arch/mips/include/asm/octeon/cvmx.h
++++ b/arch/mips/include/asm/octeon/cvmx.h
+@@ -62,6 +62,7 @@ enum cvmx_mips_space {
+ #include <asm/octeon/cvmx-iob-defs.h>
+ #include <asm/octeon/cvmx-ipd-defs.h>
+ #include <asm/octeon/cvmx-l2c-defs.h>
++#include <asm/octeon/cvmx-l2d-defs.h>
+ #include <asm/octeon/cvmx-l2t-defs.h>
+ #include <asm/octeon/cvmx-led-defs.h>
+ #include <asm/octeon/cvmx-mio-defs.h>
--- /dev/null
+From ae5b0675942ab30cde96099c68a2290bd1aafcca Mon Sep 17 00:00:00 2001
+From: Paul Burton <paul.burton@imgtec.com>
+Date: Tue, 1 Aug 2017 13:32:57 -0700
+Subject: Revert "MIPS: Don't unnecessarily include kmalloc.h into <asm/cache.h>."
+
+From: Paul Burton <paul.burton@imgtec.com>
+
+commit ae5b0675942ab30cde96099c68a2290bd1aafcca upstream.
+
+Commit 296e46db0073 ("MIPS: Don't unnecessarily include kmalloc.h into
+<asm/cache.h>.") claimed that the inclusion of the machine's kmalloc.h
+from asm/cache.h is unnecessary, but this is not true.
+
+Without including kmalloc.h we don't get a definition for
+ARCH_DMA_MINALIGN, which means we no longer suitably align DMA. Further
+to this the definition of ARCH_KMALLOC_MINALIGN provided by linux/slab.h
+ends up being set to the alignment of an unsigned long long value rather
+than to ARCH_DMA_MINALIGN, which means that buffers allocated using
+kmalloc may no longer be safely aligned for use with DMA.
+
+Fix this by re-adding the include of kmalloc.h in asm/cache.h. This
+reverts commit 296e46db0073 ("MIPS: Don't unnecessarily include
+kmalloc.h into <asm/cache.h>.")
+
+Signed-off-by: Paul Burton <paul.burton@imgtec.com>
+Fixes: 296e46db0073 ("MIPS: Don't unnecessarily include kmalloc.h into <asm/cache.h>.")
+Cc: linux-mips@linux-mips.org
+Patchwork: https://patchwork.linux-mips.org/patch/16895/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/mips/include/asm/cache.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/mips/include/asm/cache.h
++++ b/arch/mips/include/asm/cache.h
+@@ -9,6 +9,8 @@
+ #ifndef _ASM_CACHE_H
+ #define _ASM_CACHE_H
+
++#include <kmalloc.h>
++
+ #define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT
+ #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+
projects / thirdparty / kernel / stable-queue.git / commitdiff
