arm64: zynqmp: Remove clock-names from GEM in zynqmp-clk-ccf.dtsi

Remove clock-names from GEM nodes from clk-ccf because they should be only
present in zynqmp.dtsi. And as is visible both clock-names defined didn't
really match.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi
index a8b025899460189a4237a240bc6af29b1fc50adb..b0700022a426830a2e80cdabda38cd15a1a6c635 100644 (file)
--- a/arch/arm/dts/zynqmp-clk-ccf.dtsi
+++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi
@@ -176,28 +176,24 @@
        clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM0_REF>,
                 <&zynqmp_clk GEM0_TX>, <&zynqmp_clk GEM0_RX>,
                 <&zynqmp_clk GEM_TSU>;
-       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
 };
 
 &gem1 {
        clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>,
                 <&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>,
                 <&zynqmp_clk GEM_TSU>;
-       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
 };
 
 &gem2 {
        clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM2_REF>,
                 <&zynqmp_clk GEM2_TX>, <&zynqmp_clk GEM2_RX>,
                 <&zynqmp_clk GEM_TSU>;
-       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
 };
 
 &gem3 {
        clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM3_REF>,
                 <&zynqmp_clk GEM3_TX>, <&zynqmp_clk GEM3_RX>,
                 <&zynqmp_clk GEM_TSU>;
-       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
 };
 
 &gpio {

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index c3bd496b97796052de53eba8fa2b512b2fa22235..51cec1ac3642ea4a30d4d8137fab0539a3e1186f 100644 (file)
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -591,7 +591,7 @@
                        interrupt-parent = <&gic>;
                        interrupts = <0 57 4>, <0 57 4>;
                        reg = <0x0 0xff0b0000 0x0 0x1000>;
-                       clock-names = "pclk", "hclk", "tx_clk";
+                       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        #stream-id-cells = <1>;
@@ -605,7 +605,7 @@
                        interrupt-parent = <&gic>;
                        interrupts = <0 59 4>, <0 59 4>;
                        reg = <0x0 0xff0c0000 0x0 0x1000>;
-                       clock-names = "pclk", "hclk", "tx_clk";
+                       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        #stream-id-cells = <1>;
@@ -619,7 +619,7 @@
                        interrupt-parent = <&gic>;
                        interrupts = <0 61 4>, <0 61 4>;
                        reg = <0x0 0xff0d0000 0x0 0x1000>;
-                       clock-names = "pclk", "hclk", "tx_clk";
+                       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        #stream-id-cells = <1>;
@@ -633,7 +633,7 @@
                        interrupt-parent = <&gic>;
                        interrupts = <0 63 4>, <0 63 4>;
                        reg = <0x0 0xff0e0000 0x0 0x1000>;
-                       clock-names = "pclk", "hclk", "tx_clk";
+                       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        #stream-id-cells = <1>;