5.15-stable patches

added patches:
	iio-accel-bma180-rearrange-iio-trigger-get-and-register.patch
	iio-accel-kxcjk-1013-rearrange-iio-trigger-get-and-register.patch
	iio-accel-mma8452-ignore-the-return-value-of-reset-operation.patch
	iio-accel-mxc4005-rearrange-iio-trigger-get-and-register.patch
	iio-adc-stm32-fix-adcs-iteration-in-irq-handler.patch
	iio-adc-stm32-fix-irqs-on-stm32f4-by-removing-custom-spurious-irqs-message.patch
	iio-adc-stm32-fix-maximum-clock-rate-for-stm32mp15x.patch
	iio-afe-rescale-fix-boolean-logic-bug.patch
	iio-chemical-ccs811-rearrange-iio-trigger-get-and-register.patch
	iio-gyro-mpu3050-fix-the-error-handling-in-mpu3050_power_up.patch
	iio-imu-inv_icm42600-fix-broken-icm42600-chip-id-0-value.patch
	iio-trigger-sysfs-fix-use-after-free-on-remove.patch

diff --git a/queue-5.15/iio-accel-bma180-rearrange-iio-trigger-get-and-register.patch b/queue-5.15/iio-accel-bma180-rearrange-iio-trigger-get-and-register.patch
new file mode 100644 (file)
index 0000000..d7a016d
--- /dev/null
+++ b/queue-5.15/iio-accel-bma180-rearrange-iio-trigger-get-and-register.patch
@@ -0,0 +1,45 @@
+From e5f3205b04d7f95a2ef43bce4b454a7f264d6923 Mon Sep 17 00:00:00 2001
+From: Dmitry Rokosov <DDRokosov@sberdevices.ru>
+Date: Tue, 24 May 2022 18:14:39 +0000
+Subject: iio:accel:bma180: rearrange iio trigger get and register
+
+From: Dmitry Rokosov <DDRokosov@sberdevices.ru>
+
+commit e5f3205b04d7f95a2ef43bce4b454a7f264d6923 upstream.
+
+IIO trigger interface function iio_trigger_get() should be called after
+iio_trigger_register() (or its devm analogue) strictly, because of
+iio_trigger_get() acquires module refcnt based on the trigger->owner
+pointer, which is initialized inside iio_trigger_register() to
+THIS_MODULE.
+If this call order is wrong, the next iio_trigger_put() (from sysfs
+callback or "delete module" path) will dereference "default" module
+refcnt, which is incorrect behaviour.
+
+Fixes: 0668a4e4d297 ("iio: accel: bma180: Fix indio_dev->trig assignment")
+Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
+Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
+Link: https://lore.kernel.org/r/20220524181150.9240-2-ddrokosov@sberdevices.ru
+Cc: <Stable@vger.kernel.org>
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/iio/accel/bma180.c |    3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/iio/accel/bma180.c
++++ b/drivers/iio/accel/bma180.c
+@@ -1006,11 +1006,12 @@ static int bma180_probe(struct i2c_clien
+ 
+               data->trig->ops = &bma180_trigger_ops;
+               iio_trigger_set_drvdata(data->trig, indio_dev);
+-              indio_dev->trig = iio_trigger_get(data->trig);
+ 
+               ret = iio_trigger_register(data->trig);
+               if (ret)
+                       goto err_trigger_free;
++
++              indio_dev->trig = iio_trigger_get(data->trig);
+       }
+ 
+       ret = iio_triggered_buffer_setup(indio_dev, NULL,

diff --git a/queue-5.15/iio-accel-kxcjk-1013-rearrange-iio-trigger-get-and-register.patch b/queue-5.15/iio-accel-kxcjk-1013-rearrange-iio-trigger-get-and-register.patch
new file mode 100644 (file)
index 0000000..3106e4e
--- /dev/null
+++ b/queue-5.15/iio-accel-kxcjk-1013-rearrange-iio-trigger-get-and-register.patch
@@ -0,0 +1,46 @@
+From ed302925d708f2f97ae5e9fd6c56c16bb34f6629 Mon Sep 17 00:00:00 2001
+From: Dmitry Rokosov <DDRokosov@sberdevices.ru>
+Date: Tue, 24 May 2022 18:14:42 +0000
+Subject: iio:accel:kxcjk-1013: rearrange iio trigger get and register
+
+From: Dmitry Rokosov <DDRokosov@sberdevices.ru>
+
+commit ed302925d708f2f97ae5e9fd6c56c16bb34f6629 upstream.
+
+IIO trigger interface function iio_trigger_get() should be called after
+iio_trigger_register() (or its devm analogue) strictly, because of
+iio_trigger_get() acquires module refcnt based on the trigger->owner
+pointer, which is initialized inside iio_trigger_register() to
+THIS_MODULE.
+If this call order is wrong, the next iio_trigger_put() (from sysfs
+callback or "delete module" path) will dereference "default" module
+refcnt, which is incorrect behaviour.
+
+Fixes: c1288b833881 ("iio: accel: kxcjk-1013: Increment ref counter for indio_dev->trig")
+Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
+Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
+Link: https://lore.kernel.org/r/20220524181150.9240-3-ddrokosov@sberdevices.ru
+Cc: <Stable@vger.kernel.org>
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/iio/accel/kxcjk-1013.c |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/iio/accel/kxcjk-1013.c
++++ b/drivers/iio/accel/kxcjk-1013.c
+@@ -1553,12 +1553,12 @@ static int kxcjk1013_probe(struct i2c_cl
+ 
+               data->dready_trig->ops = &kxcjk1013_trigger_ops;
+               iio_trigger_set_drvdata(data->dready_trig, indio_dev);
+-              indio_dev->trig = data->dready_trig;
+-              iio_trigger_get(indio_dev->trig);
+               ret = iio_trigger_register(data->dready_trig);
+               if (ret)
+                       goto err_poweroff;
+ 
++              indio_dev->trig = iio_trigger_get(data->dready_trig);
++
+               data->motion_trig->ops = &kxcjk1013_trigger_ops;
+               iio_trigger_set_drvdata(data->motion_trig, indio_dev);
+               ret = iio_trigger_register(data->motion_trig);

diff --git a/queue-5.15/iio-accel-mma8452-ignore-the-return-value-of-reset-operation.patch b/queue-5.15/iio-accel-mma8452-ignore-the-return-value-of-reset-operation.patch
new file mode 100644 (file)
index 0000000..2335c4a
--- /dev/null
+++ b/queue-5.15/iio-accel-mma8452-ignore-the-return-value-of-reset-operation.patch
@@ -0,0 +1,44 @@
+From bf745142cc0a3e1723f9207fb0c073c88464b7b4 Mon Sep 17 00:00:00 2001
+From: Haibo Chen <haibo.chen@nxp.com>
+Date: Wed, 15 Jun 2022 19:31:58 +0800
+Subject: iio: accel: mma8452: ignore the return value of reset operation
+
+From: Haibo Chen <haibo.chen@nxp.com>
+
+commit bf745142cc0a3e1723f9207fb0c073c88464b7b4 upstream.
+
+On fxls8471, after set the reset bit, the device will reset immediately,
+will not give ACK. So ignore the return value of this reset operation,
+let the following code logic to check whether the reset operation works.
+
+Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
+Fixes: ecabae713196 ("iio: mma8452: Initialise before activating")
+Reviewed-by: Hans de Goede <hdegoede@redhat.com>
+Link: https://lore.kernel.org/r/1655292718-14287-1-git-send-email-haibo.chen@nxp.com
+Cc: <Stable@vger.kernel.org>
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/iio/accel/mma8452.c |   10 +++++++---
+ 1 file changed, 7 insertions(+), 3 deletions(-)
+
+--- a/drivers/iio/accel/mma8452.c
++++ b/drivers/iio/accel/mma8452.c
+@@ -1493,10 +1493,14 @@ static int mma8452_reset(struct i2c_clie
+       int i;
+       int ret;
+ 
+-      ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG2,
++      /*
++       * Find on fxls8471, after config reset bit, it reset immediately,
++       * and will not give ACK, so here do not check the return value.
++       * The following code will read the reset register, and check whether
++       * this reset works.
++       */
++      i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG2,
+                                       MMA8452_CTRL_REG2_RST);
+-      if (ret < 0)
+-              return ret;
+ 
+       for (i = 0; i < 10; i++) {
+               usleep_range(100, 200);

diff --git a/queue-5.15/iio-accel-mxc4005-rearrange-iio-trigger-get-and-register.patch b/queue-5.15/iio-accel-mxc4005-rearrange-iio-trigger-get-and-register.patch
new file mode 100644 (file)
index 0000000..952dcc8
--- /dev/null
+++ b/queue-5.15/iio-accel-mxc4005-rearrange-iio-trigger-get-and-register.patch
@@ -0,0 +1,49 @@
+From 9354c224c9b4f55847a0de3e968cba2ebf15af3b Mon Sep 17 00:00:00 2001
+From: Dmitry Rokosov <DDRokosov@sberdevices.ru>
+Date: Tue, 24 May 2022 18:14:43 +0000
+Subject: iio:accel:mxc4005: rearrange iio trigger get and register
+
+From: Dmitry Rokosov <DDRokosov@sberdevices.ru>
+
+commit 9354c224c9b4f55847a0de3e968cba2ebf15af3b upstream.
+
+IIO trigger interface function iio_trigger_get() should be called after
+iio_trigger_register() (or its devm analogue) strictly, because of
+iio_trigger_get() acquires module refcnt based on the trigger->owner
+pointer, which is initialized inside iio_trigger_register() to
+THIS_MODULE.
+If this call order is wrong, the next iio_trigger_put() (from sysfs
+callback or "delete module" path) will dereference "default" module
+refcnt, which is incorrect behaviour.
+
+Fixes: 47196620c82f ("iio: mxc4005: add data ready trigger for mxc4005")
+Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
+Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
+Link: https://lore.kernel.org/r/20220524181150.9240-4-ddrokosov@sberdevices.ru
+Cc: <Stable@vger.kernel.org>
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/iio/accel/mxc4005.c |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/iio/accel/mxc4005.c
++++ b/drivers/iio/accel/mxc4005.c
+@@ -456,8 +456,6 @@ static int mxc4005_probe(struct i2c_clie
+ 
+               data->dready_trig->ops = &mxc4005_trigger_ops;
+               iio_trigger_set_drvdata(data->dready_trig, indio_dev);
+-              indio_dev->trig = data->dready_trig;
+-              iio_trigger_get(indio_dev->trig);
+               ret = devm_iio_trigger_register(&client->dev,
+                                               data->dready_trig);
+               if (ret) {
+@@ -465,6 +463,8 @@ static int mxc4005_probe(struct i2c_clie
+                               "failed to register trigger\n");
+                       return ret;
+               }
++
++              indio_dev->trig = iio_trigger_get(data->dready_trig);
+       }
+ 
+       return devm_iio_device_register(&client->dev, indio_dev);

diff --git a/queue-5.15/iio-adc-stm32-fix-adcs-iteration-in-irq-handler.patch b/queue-5.15/iio-adc-stm32-fix-adcs-iteration-in-irq-handler.patch
new file mode 100644 (file)
index 0000000..29b647e
--- /dev/null
+++ b/queue-5.15/iio-adc-stm32-fix-adcs-iteration-in-irq-handler.patch
@@ -0,0 +1,79 @@
+From d2214cca4d3eadc74eac9e30301ec7cad5355f00 Mon Sep 17 00:00:00 2001
+From: Yannick Brosseau <yannick.brosseau@gmail.com>
+Date: Mon, 16 May 2022 16:39:38 -0400
+Subject: iio: adc: stm32: Fix ADCs iteration in irq handler
+
+From: Yannick Brosseau <yannick.brosseau@gmail.com>
+
+commit d2214cca4d3eadc74eac9e30301ec7cad5355f00 upstream.
+
+The irq handler was only checking the mask for the first ADCs in the case of the
+F4 and H7 generation, since it was iterating up to the num_irq value. This patch add
+the maximum number of ADC in the common register, which map to the number of entries of
+eoc_msk and ovr_msk in stm32_adc_common_regs. This allow the handler to check all ADCs in
+that module.
+
+Tested on a STM32F429NIH6.
+
+Fixes: 695e2f5c289b ("iio: adc: stm32-adc: fix a regression when using dma and irq")
+Signed-off-by: Yannick Brosseau <yannick.brosseau@gmail.com>
+Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
+Link: https://lore.kernel.org/r/20220516203939.3498673-2-yannick.brosseau@gmail.com
+Cc: <Stable@vger.kernel.org>
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/iio/adc/stm32-adc-core.c |    7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+--- a/drivers/iio/adc/stm32-adc-core.c
++++ b/drivers/iio/adc/stm32-adc-core.c
+@@ -64,6 +64,7 @@ struct stm32_adc_priv;
+  * @max_clk_rate_hz: maximum analog clock rate (Hz, from datasheet)
+  * @has_syscfg: SYSCFG capability flags
+  * @num_irqs: number of interrupt lines
++ * @num_adcs:   maximum number of ADC instances in the common registers
+  */
+ struct stm32_adc_priv_cfg {
+       const struct stm32_adc_common_regs *regs;
+@@ -71,6 +72,7 @@ struct stm32_adc_priv_cfg {
+       u32 max_clk_rate_hz;
+       unsigned int has_syscfg;
+       unsigned int num_irqs;
++      unsigned int num_adcs;
+ };
+ 
+ /**
+@@ -352,7 +354,7 @@ static void stm32_adc_irq_handler(struct
+        * before invoking the interrupt handler (e.g. call ISR only for
+        * IRQ-enabled ADCs).
+        */
+-      for (i = 0; i < priv->cfg->num_irqs; i++) {
++      for (i = 0; i < priv->cfg->num_adcs; i++) {
+               if ((status & priv->cfg->regs->eoc_msk[i] &&
+                    stm32_adc_eoc_enabled(priv, i)) ||
+                    (status & priv->cfg->regs->ovr_msk[i]))
+@@ -796,6 +798,7 @@ static const struct stm32_adc_priv_cfg s
+       .clk_sel = stm32f4_adc_clk_sel,
+       .max_clk_rate_hz = 36000000,
+       .num_irqs = 1,
++      .num_adcs = 3,
+ };
+ 
+ static const struct stm32_adc_priv_cfg stm32h7_adc_priv_cfg = {
+@@ -804,6 +807,7 @@ static const struct stm32_adc_priv_cfg s
+       .max_clk_rate_hz = 36000000,
+       .has_syscfg = HAS_VBOOSTER,
+       .num_irqs = 1,
++      .num_adcs = 2,
+ };
+ 
+ static const struct stm32_adc_priv_cfg stm32mp1_adc_priv_cfg = {
+@@ -812,6 +816,7 @@ static const struct stm32_adc_priv_cfg s
+       .max_clk_rate_hz = 36000000,
+       .has_syscfg = HAS_VBOOSTER | HAS_ANASWVDD,
+       .num_irqs = 2,
++      .num_adcs = 2,
+ };
+ 
+ static const struct of_device_id stm32_adc_of_match[] = {

diff --git a/queue-5.15/iio-adc-stm32-fix-irqs-on-stm32f4-by-removing-custom-spurious-irqs-message.patch b/queue-5.15/iio-adc-stm32-fix-irqs-on-stm32f4-by-removing-custom-spurious-irqs-message.patch
new file mode 100644 (file)
index 0000000..b71c3c1
--- /dev/null
+++ b/queue-5.15/iio-adc-stm32-fix-irqs-on-stm32f4-by-removing-custom-spurious-irqs-message.patch
@@ -0,0 +1,60 @@
+From 99bded02dae5e1e2312813506c41dc8db2fb656c Mon Sep 17 00:00:00 2001
+From: Yannick Brosseau <yannick.brosseau@gmail.com>
+Date: Mon, 16 May 2022 16:39:39 -0400
+Subject: iio: adc: stm32: Fix IRQs on STM32F4 by removing custom spurious IRQs message
+
+From: Yannick Brosseau <yannick.brosseau@gmail.com>
+
+commit 99bded02dae5e1e2312813506c41dc8db2fb656c upstream.
+
+The check for spurious IRQs introduced in 695e2f5c289bb assumed that the bits
+in the control and status registers are aligned. This is true for the H7 and MP1
+version, but not the F4. The interrupt was then never handled on the F4.
+
+Instead of increasing the complexity of the comparison and check each bit specifically,
+we remove this check completely and rely on the generic handler for spurious IRQs.
+
+Fixes: 695e2f5c289b ("iio: adc: stm32-adc: fix a regression when using dma and irq")
+Signed-off-by: Yannick Brosseau <yannick.brosseau@gmail.com>
+Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
+Link: https://lore.kernel.org/r/20220516203939.3498673-3-yannick.brosseau@gmail.com
+Cc: <Stable@vger.kernel.org>
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/iio/adc/stm32-adc.c |   10 ----------
+ 1 file changed, 10 deletions(-)
+
+--- a/drivers/iio/adc/stm32-adc.c
++++ b/drivers/iio/adc/stm32-adc.c
+@@ -1259,7 +1259,6 @@ static irqreturn_t stm32_adc_threaded_is
+       struct stm32_adc *adc = iio_priv(indio_dev);
+       const struct stm32_adc_regspec *regs = adc->cfg->regs;
+       u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg);
+-      u32 mask = stm32_adc_readl(adc, regs->ier_eoc.reg);
+ 
+       /* Check ovr status right now, as ovr mask should be already disabled */
+       if (status & regs->isr_ovr.mask) {
+@@ -1274,11 +1273,6 @@ static irqreturn_t stm32_adc_threaded_is
+               return IRQ_HANDLED;
+       }
+ 
+-      if (!(status & mask))
+-              dev_err_ratelimited(&indio_dev->dev,
+-                                  "Unexpected IRQ: IER=0x%08x, ISR=0x%08x\n",
+-                                  mask, status);
+-
+       return IRQ_NONE;
+ }
+ 
+@@ -1288,10 +1282,6 @@ static irqreturn_t stm32_adc_isr(int irq
+       struct stm32_adc *adc = iio_priv(indio_dev);
+       const struct stm32_adc_regspec *regs = adc->cfg->regs;
+       u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg);
+-      u32 mask = stm32_adc_readl(adc, regs->ier_eoc.reg);
+-
+-      if (!(status & mask))
+-              return IRQ_WAKE_THREAD;
+ 
+       if (status & regs->isr_ovr.mask) {
+               /*

diff --git a/queue-5.15/iio-adc-stm32-fix-maximum-clock-rate-for-stm32mp15x.patch b/queue-5.15/iio-adc-stm32-fix-maximum-clock-rate-for-stm32mp15x.patch
new file mode 100644 (file)
index 0000000..b418444
--- /dev/null
+++ b/queue-5.15/iio-adc-stm32-fix-maximum-clock-rate-for-stm32mp15x.patch
@@ -0,0 +1,34 @@
+From 990539486e7e311fb5dab1bf4d85d1a8973ae644 Mon Sep 17 00:00:00 2001
+From: Olivier Moysan <olivier.moysan@foss.st.com>
+Date: Thu, 9 Jun 2022 11:52:34 +0200
+Subject: iio: adc: stm32: fix maximum clock rate for stm32mp15x
+
+From: Olivier Moysan <olivier.moysan@foss.st.com>
+
+commit 990539486e7e311fb5dab1bf4d85d1a8973ae644 upstream.
+
+Change maximum STM32 ADC input clock rate to 36MHz, as specified
+in STM32MP15x datasheets.
+
+Fixes: d58c67d1d851 ("iio: adc: stm32-adc: add support for STM32MP1")
+Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
+Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
+Link: https://lore.kernel.org/r/20220609095234.375925-1-olivier.moysan@foss.st.com
+Cc: <Stable@vger.kernel.org>
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/iio/adc/stm32-adc-core.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/iio/adc/stm32-adc-core.c
++++ b/drivers/iio/adc/stm32-adc-core.c
+@@ -809,7 +809,7 @@ static const struct stm32_adc_priv_cfg s
+ static const struct stm32_adc_priv_cfg stm32mp1_adc_priv_cfg = {
+       .regs = &stm32h7_adc_common_regs,
+       .clk_sel = stm32h7_adc_clk_sel,
+-      .max_clk_rate_hz = 40000000,
++      .max_clk_rate_hz = 36000000,
+       .has_syscfg = HAS_VBOOSTER | HAS_ANASWVDD,
+       .num_irqs = 2,
+ };

diff --git a/queue-5.15/iio-afe-rescale-fix-boolean-logic-bug.patch b/queue-5.15/iio-afe-rescale-fix-boolean-logic-bug.patch
new file mode 100644 (file)
index 0000000..21e2d12
--- /dev/null
+++ b/queue-5.15/iio-afe-rescale-fix-boolean-logic-bug.patch
@@ -0,0 +1,55 @@
+From 9decacd8b3a432316d61c4366f302e63384cb08d Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Tue, 24 May 2022 09:54:48 +0200
+Subject: iio: afe: rescale: Fix boolean logic bug
+
+From: Linus Walleij <linus.walleij@linaro.org>
+
+commit 9decacd8b3a432316d61c4366f302e63384cb08d upstream.
+
+When introducing support for processed channels I needed
+to invert the expression:
+
+  if (!iio_channel_has_info(schan, IIO_CHAN_INFO_RAW) ||
+      !iio_channel_has_info(schan, IIO_CHAN_INFO_SCALE))
+        dev_err(dev, "source channel does not support raw/scale\n");
+
+To the inverse, meaning detect when we can usse raw+scale
+rather than when we can not. This was the result:
+
+  if (iio_channel_has_info(schan, IIO_CHAN_INFO_RAW) ||
+      iio_channel_has_info(schan, IIO_CHAN_INFO_SCALE))
+       dev_info(dev, "using raw+scale source channel\n");
+
+Ooops. Spot the error. Yep old George Boole came up and bit me.
+That should be an &&.
+
+The current code "mostly works" because we have not run into
+systems supporting only raw but not scale or only scale but not
+raw, and I doubt there are few using the rescaler on anything
+such, but let's fix the logic.
+
+Cc: Liam Beguin <liambeguin@gmail.com>
+Cc: stable@vger.kernel.org
+Fixes: 53ebee949980 ("iio: afe: iio-rescale: Support processed channels")
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Reviewed-by: Liam Beguin <liambeguin@gmail.com>
+Acked-by: Peter Rosin <peda@axentia.se>
+Link: https://lore.kernel.org/r/20220524075448.140238-1-linus.walleij@linaro.org
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/iio/afe/iio-rescale.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/iio/afe/iio-rescale.c
++++ b/drivers/iio/afe/iio-rescale.c
+@@ -148,7 +148,7 @@ static int rescale_configure_channel(str
+       chan->ext_info = rescale->ext_info;
+       chan->type = rescale->cfg->type;
+ 
+-      if (iio_channel_has_info(schan, IIO_CHAN_INFO_RAW) ||
++      if (iio_channel_has_info(schan, IIO_CHAN_INFO_RAW) &&
+           iio_channel_has_info(schan, IIO_CHAN_INFO_SCALE)) {
+               dev_info(dev, "using raw+scale source channel\n");
+       } else if (iio_channel_has_info(schan, IIO_CHAN_INFO_PROCESSED)) {

diff --git a/queue-5.15/iio-chemical-ccs811-rearrange-iio-trigger-get-and-register.patch b/queue-5.15/iio-chemical-ccs811-rearrange-iio-trigger-get-and-register.patch
new file mode 100644 (file)
index 0000000..102c9ee
--- /dev/null
+++ b/queue-5.15/iio-chemical-ccs811-rearrange-iio-trigger-get-and-register.patch
@@ -0,0 +1,45 @@
+From d710359c0b445e8c03e24f19ae2fb79ce7282260 Mon Sep 17 00:00:00 2001
+From: Dmitry Rokosov <DDRokosov@sberdevices.ru>
+Date: Tue, 24 May 2022 18:14:45 +0000
+Subject: iio:chemical:ccs811: rearrange iio trigger get and register
+
+From: Dmitry Rokosov <DDRokosov@sberdevices.ru>
+
+commit d710359c0b445e8c03e24f19ae2fb79ce7282260 upstream.
+
+IIO trigger interface function iio_trigger_get() should be called after
+iio_trigger_register() (or its devm analogue) strictly, because of
+iio_trigger_get() acquires module refcnt based on the trigger->owner
+pointer, which is initialized inside iio_trigger_register() to
+THIS_MODULE.
+If this call order is wrong, the next iio_trigger_put() (from sysfs
+callback or "delete module" path) will dereference "default" module
+refcnt, which is incorrect behaviour.
+
+Fixes: f1f065d7ac30 ("iio: chemical: ccs811: Add support for data ready trigger")
+Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
+Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
+Link: https://lore.kernel.org/r/20220524181150.9240-5-ddrokosov@sberdevices.ru
+Cc: <Stable@vger.kernel.org>
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/iio/chemical/ccs811.c |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/iio/chemical/ccs811.c
++++ b/drivers/iio/chemical/ccs811.c
+@@ -499,11 +499,11 @@ static int ccs811_probe(struct i2c_clien
+ 
+               data->drdy_trig->ops = &ccs811_trigger_ops;
+               iio_trigger_set_drvdata(data->drdy_trig, indio_dev);
+-              indio_dev->trig = data->drdy_trig;
+-              iio_trigger_get(indio_dev->trig);
+               ret = iio_trigger_register(data->drdy_trig);
+               if (ret)
+                       goto err_poweroff;
++
++              indio_dev->trig = iio_trigger_get(data->drdy_trig);
+       }
+ 
+       ret = iio_triggered_buffer_setup(indio_dev, NULL,

diff --git a/queue-5.15/iio-gyro-mpu3050-fix-the-error-handling-in-mpu3050_power_up.patch b/queue-5.15/iio-gyro-mpu3050-fix-the-error-handling-in-mpu3050_power_up.patch
new file mode 100644 (file)
index 0000000..45fe62e
--- /dev/null
+++ b/queue-5.15/iio-gyro-mpu3050-fix-the-error-handling-in-mpu3050_power_up.patch
@@ -0,0 +1,31 @@
+From b2f5ad97645e1deb5ca9bcb7090084b92cae35d2 Mon Sep 17 00:00:00 2001
+From: Zheyu Ma <zheyuma97@gmail.com>
+Date: Tue, 10 May 2022 17:24:31 +0800
+Subject: iio: gyro: mpu3050: Fix the error handling in mpu3050_power_up()
+
+From: Zheyu Ma <zheyuma97@gmail.com>
+
+commit b2f5ad97645e1deb5ca9bcb7090084b92cae35d2 upstream.
+
+The driver should disable regulators when fails at regmap_update_bits().
+
+Signed-off-by: Zheyu Ma <zheyuma97@gmail.com>
+Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
+Cc: <Stable@vger.kernel.org>
+Link: https://lore.kernel.org/r/20220510092431.1711284-1-zheyuma97@gmail.com
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/iio/gyro/mpu3050-core.c |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/iio/gyro/mpu3050-core.c
++++ b/drivers/iio/gyro/mpu3050-core.c
+@@ -876,6 +876,7 @@ static int mpu3050_power_up(struct mpu30
+       ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM,
+                                MPU3050_PWR_MGM_SLEEP, 0);
+       if (ret) {
++              regulator_bulk_disable(ARRAY_SIZE(mpu3050->regs), mpu3050->regs);
+               dev_err(mpu3050->dev, "error setting power mode\n");
+               return ret;
+       }

diff --git a/queue-5.15/iio-imu-inv_icm42600-fix-broken-icm42600-chip-id-0-value.patch b/queue-5.15/iio-imu-inv_icm42600-fix-broken-icm42600-chip-id-0-value.patch
new file mode 100644 (file)
index 0000000..78dc880
--- /dev/null
+++ b/queue-5.15/iio-imu-inv_icm42600-fix-broken-icm42600-chip-id-0-value.patch
@@ -0,0 +1,47 @@
+From 106b391e1b859100a3f38f0ad874236e9be06bde Mon Sep 17 00:00:00 2001
+From: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
+Date: Thu, 9 Jun 2022 12:23:01 +0200
+Subject: iio: imu: inv_icm42600: Fix broken icm42600 (chip id 0 value)
+
+From: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
+
+commit 106b391e1b859100a3f38f0ad874236e9be06bde upstream.
+
+The 0 value used for INV_CHIP_ICM42600 was not working since the
+match in i2c/spi was checking against NULL value.
+
+To keep this check, add a first INV_CHIP_INVALID 0 value as safe
+guard.
+
+Fixes: 31c24c1e93c3 ("iio: imu: inv_icm42600: add core of new inv_icm42600 driver")
+Signed-off-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
+Link: https://lore.kernel.org/r/20220609102301.4794-1-jmaneyrol@invensense.com
+Cc: <Stable@vger.kernel.org>
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/iio/imu/inv_icm42600/inv_icm42600.h      |    1 +
+ drivers/iio/imu/inv_icm42600/inv_icm42600_core.c |    2 +-
+ 2 files changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/iio/imu/inv_icm42600/inv_icm42600.h
++++ b/drivers/iio/imu/inv_icm42600/inv_icm42600.h
+@@ -17,6 +17,7 @@
+ #include "inv_icm42600_buffer.h"
+ 
+ enum inv_icm42600_chip {
++      INV_CHIP_INVALID,
+       INV_CHIP_ICM42600,
+       INV_CHIP_ICM42602,
+       INV_CHIP_ICM42605,
+--- a/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
++++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
+@@ -565,7 +565,7 @@ int inv_icm42600_core_probe(struct regma
+       bool open_drain;
+       int ret;
+ 
+-      if (chip < 0 || chip >= INV_CHIP_NB) {
++      if (chip <= INV_CHIP_INVALID || chip >= INV_CHIP_NB) {
+               dev_err(dev, "invalid chip = %d\n", chip);
+               return -ENODEV;
+       }

diff --git a/queue-5.15/iio-trigger-sysfs-fix-use-after-free-on-remove.patch b/queue-5.15/iio-trigger-sysfs-fix-use-after-free-on-remove.patch
new file mode 100644 (file)
index 0000000..5654182
--- /dev/null
+++ b/queue-5.15/iio-trigger-sysfs-fix-use-after-free-on-remove.patch
@@ -0,0 +1,69 @@
+From 78601726d4a59a291acc5a52da1d3a0a6831e4e8 Mon Sep 17 00:00:00 2001
+From: Vincent Whitchurch <vincent.whitchurch@axis.com>
+Date: Thu, 19 May 2022 11:19:25 +0200
+Subject: iio: trigger: sysfs: fix use-after-free on remove
+
+From: Vincent Whitchurch <vincent.whitchurch@axis.com>
+
+commit 78601726d4a59a291acc5a52da1d3a0a6831e4e8 upstream.
+
+Ensure that the irq_work has completed before the trigger is freed.
+
+ ==================================================================
+ BUG: KASAN: use-after-free in irq_work_run_list
+ Read of size 8 at addr 0000000064702248 by task python3/25
+
+ Call Trace:
+  irq_work_run_list
+  irq_work_tick
+  update_process_times
+  tick_sched_handle
+  tick_sched_timer
+  __hrtimer_run_queues
+  hrtimer_interrupt
+
+ Allocated by task 25:
+  kmem_cache_alloc_trace
+  iio_sysfs_trig_add
+  dev_attr_store
+  sysfs_kf_write
+  kernfs_fop_write_iter
+  new_sync_write
+  vfs_write
+  ksys_write
+  sys_write
+
+ Freed by task 25:
+  kfree
+  iio_sysfs_trig_remove
+  dev_attr_store
+  sysfs_kf_write
+  kernfs_fop_write_iter
+  new_sync_write
+  vfs_write
+  ksys_write
+  sys_write
+
+ ==================================================================
+
+Fixes: f38bc926d022 ("staging:iio:sysfs-trigger: Use irq_work to properly active trigger")
+Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
+Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
+Link: https://lore.kernel.org/r/20220519091925.1053897-1-vincent.whitchurch@axis.com
+Cc: <Stable@vger.kernel.org>
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/iio/trigger/iio-trig-sysfs.c |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/iio/trigger/iio-trig-sysfs.c
++++ b/drivers/iio/trigger/iio-trig-sysfs.c
+@@ -195,6 +195,7 @@ static int iio_sysfs_trigger_remove(int
+       }
+ 
+       iio_trigger_unregister(t->trig);
++      irq_work_sync(&t->work);
+       iio_trigger_free(t->trig);
+ 
+       list_del(&t->l);

diff --git a/queue-5.15/series b/queue-5.15/series
index 710a0ec8d30d5a48be0c74d62f97ef2c6b04e0f2..23d93ca0decd815370633dcb308d02d680dbf84d 100644 (file)
--- a/queue-5.15/series
+++ b/queue-5.15/series
@@ -93,3 +93,15 @@ btrfs-don-t-set-lock_owner-when-locking-extent-buffer-for-reading.patch
 btrfs-fix-deadlock-with-fsync-fiemap-transaction-commit.patch
 f2fs-attach-inline_data-after-setting-compression.patch
 iio-humidity-hts221-rearrange-iio-trigger-get-and-register.patch
+iio-chemical-ccs811-rearrange-iio-trigger-get-and-register.patch
+iio-accel-kxcjk-1013-rearrange-iio-trigger-get-and-register.patch
+iio-accel-bma180-rearrange-iio-trigger-get-and-register.patch
+iio-accel-mxc4005-rearrange-iio-trigger-get-and-register.patch
+iio-accel-mma8452-ignore-the-return-value-of-reset-operation.patch
+iio-gyro-mpu3050-fix-the-error-handling-in-mpu3050_power_up.patch
+iio-trigger-sysfs-fix-use-after-free-on-remove.patch
+iio-adc-stm32-fix-maximum-clock-rate-for-stm32mp15x.patch
+iio-imu-inv_icm42600-fix-broken-icm42600-chip-id-0-value.patch
+iio-afe-rescale-fix-boolean-logic-bug.patch
+iio-adc-stm32-fix-adcs-iteration-in-irq-handler.patch
+iio-adc-stm32-fix-irqs-on-stm32f4-by-removing-custom-spurious-irqs-message.patch