compatible = "arm,pl353-smc-r2p1", "arm,primecell";
ranges;
reg = <0xe000e000 0x1000>;
- arm,addr25 = <0x0>;
- arm,nor-chip-sel0 = <0x0>;
- arm,nor-chip-sel1 = <0x0>;
- arm,sram-chip-sel0 = <0x0>;
- arm,sram-chip-sel1 = <0x0>;
nand0: flash@e1000000 {
compatible = "arm,pl353-nand-r2p1";
reg = <0xe1000000 0x1000000>;
#address-cells = <0x1>;
#size-cells = <0x1>;
- arm,nand-cycle-t0 = <0x4>;
- arm,nand-cycle-t1 = <0x4>;
- arm,nand-cycle-t2 = <0x1>;
- arm,nand-cycle-t3 = <0x2>;
- arm,nand-cycle-t4 = <0x2>;
- arm,nand-cycle-t5 = <0x2>;
- arm,nand-cycle-t6 = <0x4>;
};
};
&nand0 {
status = "okay";
- arm,nand-cycle-t0 = <0x4>;
- arm,nand-cycle-t1 = <0x4>;
- arm,nand-cycle-t2 = <0x1>;
- arm,nand-cycle-t3 = <0x2>;
- arm,nand-cycle-t4 = <0x2>;
- arm,nand-cycle-t5 = <0x2>;
- arm,nand-cycle-t6 = <0x4>;
partition@0 {
label = "nand-fsbl-uboot";
&smcc {
status = "okay";
- arm,addr25 = <0x0>;
- arm,nor-chip-sel0 = <0x0>;
- arm,nor-chip-sel1 = <0x0>;
- arm,sram-chip-sel0 = <0x0>;
- arm,sram-chip-sel1 = <0x0>;
};
&spi0 {
&smcc {
status = "okay";
- arm,addr25 = <0x1>;
- arm,nor-chip-sel0 = <0x1>;
- arm,nor-chip-sel1 = <0x0>;
- arm,sram-chip-sel0 = <0x0>;
- arm,sram-chip-sel1 = <0x0>;
};
&spi1 {