accel/ivpu: Wait for CDYN de-assertion during power down sequence

During power down, pending DVFS operations may still be in progress
when the NPU reset is asserted after CDYN=0 is set. Since the READY
bit may already be deasserted at this point, checking only the READY
bit is insufficient to ensure all transactions have completed.

Add an explicit check for CDYN de-assertion after the READY bit check
to guarantee no outstanding transactions remain before proceeding.

Fixes: 550f4dd2cedd ("accel/ivpu: Add support for Nova Lake's NPU")
Reviewed-by: Maciej Falkowski <maciej.falkowski@linux.intel.com>
Reviewed-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com>
Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com>
Link: https://patch.msgid.link/20251030091700.293341-1-karol.wachowski@linux.intel.com

diff --git a/drivers/accel/ivpu/ivpu_hw_btrs.c b/drivers/accel/ivpu/ivpu_hw_btrs.c
index 2085edbfd40adf7070052a331b9bea27cd162abf..06e65c592618549eb89c7ff8b212d6a8b3b6974e 100644 (file)
--- a/drivers/accel/ivpu/ivpu_hw_btrs.c
+++ b/drivers/accel/ivpu/ivpu_hw_btrs.c
@@ -321,6 +321,14 @@ static int wait_for_pll_lock(struct ivpu_device *vdev, bool enable)
        return REGB_POLL_FLD(VPU_HW_BTRS_MTL_PLL_STATUS, LOCK, exp_val, PLL_TIMEOUT_US);
 }
 
+static int wait_for_cdyn_deassert(struct ivpu_device *vdev)
+{
+       if (ivpu_hw_btrs_gen(vdev) == IVPU_HW_BTRS_MTL)
+               return 0;
+
+       return REGB_POLL_FLD(VPU_HW_BTRS_LNL_CDYN, CDYN, 0, PLL_TIMEOUT_US);
+}
+
 int ivpu_hw_btrs_wp_drive(struct ivpu_device *vdev, bool enable)
 {
        struct wp_request wp;
@@ -354,6 +362,14 @@ int ivpu_hw_btrs_wp_drive(struct ivpu_device *vdev, bool enable)
                return ret;
        }
 
+       if (!enable) {
+               ret = wait_for_cdyn_deassert(vdev);
+               if (ret) {
+                       ivpu_err(vdev, "Timed out waiting for CDYN deassert\n");
+                       return ret;
+               }
+       }
+
        return 0;
 }
 

diff --git a/drivers/accel/ivpu/ivpu_hw_btrs_lnl_reg.h b/drivers/accel/ivpu/ivpu_hw_btrs_lnl_reg.h
index fff2ef2cada6320969c805a4145cad9e6bb4f363..a81a9ba540fa8a2f30af1dea8a48eb9b501b9c96 100644 (file)
--- a/drivers/accel/ivpu/ivpu_hw_btrs_lnl_reg.h
+++ b/drivers/accel/ivpu/ivpu_hw_btrs_lnl_reg.h
@@ -74,6 +74,9 @@
 #define VPU_HW_BTRS_LNL_PLL_FREQ                               0x00000148u
 #define VPU_HW_BTRS_LNL_PLL_FREQ_RATIO_MASK                    GENMASK(15, 0)
 
+#define VPU_HW_BTRS_LNL_CDYN                                   0x0000014cu
+#define VPU_HW_BTRS_LNL_CDYN_CDYN_MASK                         GENMASK(15, 0)
+
 #define VPU_HW_BTRS_LNL_TILE_FUSE                              0x00000150u
 #define VPU_HW_BTRS_LNL_TILE_FUSE_VALID_MASK                   BIT_MASK(0)
 #define VPU_HW_BTRS_LNL_TILE_FUSE_CONFIG_MASK                  GENMASK(6, 1)