drm/amdgpu: Fix potential integer overflow in scheduler mask calculations

The use of 1 << i in scheduler mask calculations can result in an
unintentional integer overflow due to the expression being
evaluated as a 32-bit signed integer.

This patch replaces 1 << i with 1ULL << i to ensure the operation
is performed as a 64-bit unsigned integer, preventing overflow

Discovered in coverity scan, CID 1636393, 1636175, 1636007, 1635853

Fixes: c5c63d9cb5d3 ("drm/amdgpu: add amdgpu_gfx_sched_mask and amdgpu_compute_sched_mask debugfs")
Signed-off-by: Karol Przybylski <karprzy7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index a4dde54512b12132c957e923a742df037db353ad..4a4e40dd25d64c2db125fc4524860e3c119ef451 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -2124,7 +2124,7 @@ static int amdgpu_debugfs_gfx_sched_mask_set(void *data, u64 val)
        if (!adev)
                return -ENODEV;
 
-       mask = (1 << adev->gfx.num_gfx_rings) - 1;
+       mask = (1ULL << adev->gfx.num_gfx_rings) - 1;
        if ((val & mask) == 0)
                return -EINVAL;
 
@@ -2152,7 +2152,7 @@ static int amdgpu_debugfs_gfx_sched_mask_get(void *data, u64 *val)
        for (i = 0; i < adev->gfx.num_gfx_rings; ++i) {
                ring = &adev->gfx.gfx_ring[i];
                if (ring->sched.ready)
-                       mask |= 1 << i;
+                       mask |= 1ULL << i;
        }
 
        *val = mask;
@@ -2194,7 +2194,7 @@ static int amdgpu_debugfs_compute_sched_mask_set(void *data, u64 val)
        if (!adev)
                return -ENODEV;
 
-       mask = (1 << adev->gfx.num_compute_rings) - 1;
+       mask = (1ULL << adev->gfx.num_compute_rings) - 1;
        if ((val & mask) == 0)
                return -EINVAL;
 
@@ -2223,7 +2223,7 @@ static int amdgpu_debugfs_compute_sched_mask_get(void *data, u64 *val)
        for (i = 0; i < adev->gfx.num_compute_rings; ++i) {
                ring = &adev->gfx.compute_ring[i];
                if (ring->sched.ready)
-                       mask |= 1 << i;
+                       mask |= 1ULL << i;
        }
 
        *val = mask;