Fixes for 5.10

Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/queue-5.10/arm-dts-imx-align-spi-nor-node-name-with-dtschema.patch b/queue-5.10/arm-dts-imx-align-spi-nor-node-name-with-dtschema.patch
new file mode 100644 (file)
index 0000000..a6d72bf
--- /dev/null
+++ b/queue-5.10/arm-dts-imx-align-spi-nor-node-name-with-dtschema.patch
@@ -0,0 +1,487 @@
+From 0fad0967662d602dce381c987996909ac78dc68f Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Thu, 7 Apr 2022 16:31:54 +0200
+Subject: ARM: dts: imx: align SPI NOR node name with dtschema
+
+From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+
+[ Upstream commit ba9fe460dc2cfe90dc115b22af14dd3f13cffa0f ]
+
+The node names should be generic and SPI NOR dtschema expects "flash".
+
+Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+Stable-dep-of: af7d78c95701 ("ARM: dts: imx6qdl-kontron-samx6i: fix spi-flash compatible")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/arm/boot/dts/imx28-evk.dts                        | 2 +-
+ arch/arm/boot/dts/imx28-m28evk.dts                     | 2 +-
+ arch/arm/boot/dts/imx28-sps1.dts                       | 2 +-
+ arch/arm/boot/dts/imx6dl-rex-basic.dts                 | 2 +-
+ arch/arm/boot/dts/imx6q-ba16.dtsi                      | 2 +-
+ arch/arm/boot/dts/imx6q-bx50v3.dtsi                    | 2 +-
+ arch/arm/boot/dts/imx6q-cm-fx6.dts                     | 2 +-
+ arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts                | 2 +-
+ arch/arm/boot/dts/imx6q-dms-ba16.dts                   | 2 +-
+ arch/arm/boot/dts/imx6q-gw5400-a.dts                   | 2 +-
+ arch/arm/boot/dts/imx6q-marsboard.dts                  | 2 +-
+ arch/arm/boot/dts/imx6q-rex-pro.dts                    | 2 +-
+ arch/arm/boot/dts/imx6qdl-aristainetos.dtsi            | 2 +-
+ arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi           | 2 +-
+ arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi           | 2 +-
+ arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi          | 2 +-
+ arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi               | 2 +-
+ arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi           | 2 +-
+ arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi          | 2 +-
+ arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi              | 2 +-
+ arch/arm/boot/dts/imx6qdl-sabreauto.dtsi               | 2 +-
+ arch/arm/boot/dts/imx6qdl-sabrelite.dtsi               | 2 +-
+ arch/arm/boot/dts/imx6qdl-sabresd.dtsi                 | 2 +-
+ arch/arm/boot/dts/imx6sl-evk.dts                       | 2 +-
+ arch/arm/boot/dts/imx6sx-nitrogen6sx.dts               | 2 +-
+ arch/arm/boot/dts/imx6sx-sdb-reva.dts                  | 4 ++--
+ arch/arm/boot/dts/imx6sx-sdb.dts                       | 4 ++--
+ arch/arm/boot/dts/imx6ul-14x14-evk.dtsi                | 2 +-
+ arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi        | 2 +-
+ arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi        | 2 +-
+ arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi | 2 +-
+ arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi       | 2 +-
+ 32 files changed, 34 insertions(+), 34 deletions(-)
+
+diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts
+index 7e2b0f198dfad..1053b7c584d81 100644
+--- a/arch/arm/boot/dts/imx28-evk.dts
++++ b/arch/arm/boot/dts/imx28-evk.dts
+@@ -129,7 +129,7 @@
+                               pinctrl-0 = <&spi2_pins_a>;
+                               status = "okay";
+ 
+-                              flash: m25p80@0 {
++                              flash: flash@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+                                       compatible = "sst,sst25vf016b", "jedec,spi-nor";
+diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts
+index f3bddc5ada4b8..13acdc7916b9b 100644
+--- a/arch/arm/boot/dts/imx28-m28evk.dts
++++ b/arch/arm/boot/dts/imx28-m28evk.dts
+@@ -33,7 +33,7 @@
+                               pinctrl-0 = <&spi2_pins_a>;
+                               status = "okay";
+ 
+-                              flash: m25p80@0 {
++                              flash: flash@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+                                       compatible = "m25p80", "jedec,spi-nor";
+diff --git a/arch/arm/boot/dts/imx28-sps1.dts b/arch/arm/boot/dts/imx28-sps1.dts
+index 43be7a6a769bc..90928db0df701 100644
+--- a/arch/arm/boot/dts/imx28-sps1.dts
++++ b/arch/arm/boot/dts/imx28-sps1.dts
+@@ -51,7 +51,7 @@
+                               pinctrl-0 = <&spi2_pins_a>;
+                               status = "okay";
+ 
+-                              flash: m25p80@0 {
++                              flash: flash@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+                                       compatible = "everspin,mr25h256", "mr25h256";
+diff --git a/arch/arm/boot/dts/imx6dl-rex-basic.dts b/arch/arm/boot/dts/imx6dl-rex-basic.dts
+index 0f1616bfa9a80..b72f8ea1e6f6c 100644
+--- a/arch/arm/boot/dts/imx6dl-rex-basic.dts
++++ b/arch/arm/boot/dts/imx6dl-rex-basic.dts
+@@ -19,7 +19,7 @@
+ };
+ 
+ &ecspi3 {
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               compatible = "sst,sst25vf016b", "jedec,spi-nor";
+               spi-max-frequency = <20000000>;
+               reg = <0>;
+diff --git a/arch/arm/boot/dts/imx6q-ba16.dtsi b/arch/arm/boot/dts/imx6q-ba16.dtsi
+index e4578ed3371ef..133991ca8c633 100644
+--- a/arch/arm/boot/dts/imx6q-ba16.dtsi
++++ b/arch/arm/boot/dts/imx6q-ba16.dtsi
+@@ -139,7 +139,7 @@
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       status = "okay";
+ 
+-      flash: n25q032@0 {
++      flash: flash@0 {
+               compatible = "jedec,spi-nor";
+               #address-cells = <1>;
+               #size-cells = <1>;
+diff --git a/arch/arm/boot/dts/imx6q-bx50v3.dtsi b/arch/arm/boot/dts/imx6q-bx50v3.dtsi
+index 2a98cc657595f..66be04299cbf8 100644
+--- a/arch/arm/boot/dts/imx6q-bx50v3.dtsi
++++ b/arch/arm/boot/dts/imx6q-bx50v3.dtsi
+@@ -160,7 +160,7 @@
+       pinctrl-0 = <&pinctrl_ecspi5>;
+       status = "okay";
+ 
+-      m25_eeprom: m25p80@0 {
++      m25_eeprom: flash@0 {
+               compatible = "atmel,at25";
+               spi-max-frequency = <10000000>;
+               size = <0x8000>;
+diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts
+index bfb530f29d9de..1ad41c944b4b9 100644
+--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts
++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts
+@@ -260,7 +260,7 @@
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       status = "okay";
+ 
+-      m25p80@0 {
++      flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "st,m25p", "jedec,spi-nor";
+diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+index fa2307d8ce861..4dee1b22d5c17 100644
+--- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
++++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+@@ -102,7 +102,7 @@
+       cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+       status = "okay";
+ 
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               compatible = "m25p80", "jedec,spi-nor";
+               spi-max-frequency = <40000000>;
+               reg = <0>;
+diff --git a/arch/arm/boot/dts/imx6q-dms-ba16.dts b/arch/arm/boot/dts/imx6q-dms-ba16.dts
+index 48fb47e715f6d..137db38f0d27b 100644
+--- a/arch/arm/boot/dts/imx6q-dms-ba16.dts
++++ b/arch/arm/boot/dts/imx6q-dms-ba16.dts
+@@ -47,7 +47,7 @@
+       pinctrl-0 = <&pinctrl_ecspi5>;
+       status = "okay";
+ 
+-      m25_eeprom: m25p80@0 {
++      m25_eeprom: flash@0 {
+               compatible = "atmel,at25256B", "atmel,at25";
+               spi-max-frequency = <20000000>;
+               size = <0x8000>;
+diff --git a/arch/arm/boot/dts/imx6q-gw5400-a.dts b/arch/arm/boot/dts/imx6q-gw5400-a.dts
+index 4cde45d5c90c8..e894faba571f9 100644
+--- a/arch/arm/boot/dts/imx6q-gw5400-a.dts
++++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
+@@ -137,7 +137,7 @@
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       status = "okay";
+ 
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               compatible = "sst,w25q256", "jedec,spi-nor";
+               spi-max-frequency = <30000000>;
+               reg = <0>;
+diff --git a/arch/arm/boot/dts/imx6q-marsboard.dts b/arch/arm/boot/dts/imx6q-marsboard.dts
+index 05ee283882290..cc18010023942 100644
+--- a/arch/arm/boot/dts/imx6q-marsboard.dts
++++ b/arch/arm/boot/dts/imx6q-marsboard.dts
+@@ -100,7 +100,7 @@
+       cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
+       status = "okay";
+ 
+-      m25p80@0 {
++      flash@0 {
+               compatible = "microchip,sst25vf016b";
+               spi-max-frequency = <20000000>;
+               reg = <0>;
+diff --git a/arch/arm/boot/dts/imx6q-rex-pro.dts b/arch/arm/boot/dts/imx6q-rex-pro.dts
+index 1767e1a3cd53a..271f4b2d9b9f0 100644
+--- a/arch/arm/boot/dts/imx6q-rex-pro.dts
++++ b/arch/arm/boot/dts/imx6q-rex-pro.dts
+@@ -19,7 +19,7 @@
+ };
+ 
+ &ecspi3 {
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               compatible = "sst,sst25vf032b", "jedec,spi-nor";
+               spi-max-frequency = <20000000>;
+               reg = <0>;
+diff --git a/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi b/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
+index e21f6ac864e54..baa197c90060e 100644
+--- a/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
+@@ -96,7 +96,7 @@
+       pinctrl-0 = <&pinctrl_ecspi4>;
+       status = "okay";
+ 
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "micron,n25q128a11", "jedec,spi-nor";
+diff --git a/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi b/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
+index ead7ba27e1053..ff8cb47fb9fdb 100644
+--- a/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
+@@ -131,7 +131,7 @@
+       pinctrl-0 = <&pinctrl_ecspi4>;
+       status = "okay";
+ 
+-      flash: m25p80@1 {
++      flash: flash@1 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "micron,n25q128a11", "jedec,spi-nor";
+diff --git a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
+index 648f5fcb72e65..2c1d6f28e6950 100644
+--- a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
+@@ -35,7 +35,7 @@
+       pinctrl-0 = <&pinctrl_ecspi3>;
+       status = "okay";
+ 
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "sst,sst25vf040b", "jedec,spi-nor";
+diff --git a/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
+index e9a4115124eb0..02ab8a59df23a 100644
+--- a/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
+@@ -248,7 +248,7 @@
+       status = "okay";
+ 
+       /* default boot source: workaround #1 for errata ERR006282 */
+-      smarc_flash: spi-flash@0 {
++      smarc_flash: flash@0 {
+               compatible = "winbond,w25q16dw", "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <20000000>;
+diff --git a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
+index d526f01a2c520..b7e74d859a962 100644
+--- a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
+@@ -179,7 +179,7 @@
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       status = "okay";
+ 
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               compatible = "microchip,sst25vf016b";
+               spi-max-frequency = <20000000>;
+               reg = <0>;
+diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
+index a0917823c244f..a88323ac6c696 100644
+--- a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
+@@ -321,7 +321,7 @@
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       status = "okay";
+ 
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               compatible = "microchip,sst25vf016b";
+               spi-max-frequency = <20000000>;
+               reg = <0>;
+diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
+index 92d09a3ebe0ee..ee7e2371f94bd 100644
+--- a/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
+@@ -252,7 +252,7 @@
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       status = "okay";
+ 
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               compatible = "microchip,sst25vf016b";
+               spi-max-frequency = <20000000>;
+               reg = <0>;
+diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+index 1243677b5f977..5adeb7aed2204 100644
+--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+@@ -237,7 +237,7 @@
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       status = "okay";
+ 
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               compatible = "sst,sst25vf016b", "jedec,spi-nor";
+               spi-max-frequency = <20000000>;
+               reg = <0>;
+diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+index afe477f329846..17535bf12516d 100644
+--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+@@ -272,7 +272,7 @@
+       pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
+       status = "disabled"; /* pin conflict with WEIM NOR */
+ 
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "st,m25p32", "jedec,spi-nor";
+diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+index fdc3aa9d544d3..0aa1a0a28de0c 100644
+--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+@@ -313,7 +313,7 @@
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       status = "okay";
+ 
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               compatible = "sst,sst25vf016b", "jedec,spi-nor";
+               spi-max-frequency = <20000000>;
+               reg = <0>;
+diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+index f824c9abd11a3..758c62fb9cac1 100644
+--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+@@ -194,7 +194,7 @@
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       status = "okay";
+ 
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "st,m25p32", "jedec,spi-nor";
+diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
+index 25f6f2fb1555e..f16c830f1e918 100644
+--- a/arch/arm/boot/dts/imx6sl-evk.dts
++++ b/arch/arm/boot/dts/imx6sl-evk.dts
+@@ -137,7 +137,7 @@
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       status = "okay";
+ 
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "st,m25p32", "jedec,spi-nor";
+diff --git a/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts b/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
+index 66af78e83b701..a2c79bcf9a11c 100644
+--- a/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
++++ b/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
+@@ -107,7 +107,7 @@
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       status = "okay";
+ 
+-      flash: m25p80@0 {
++      flash: flash@0 {
+               compatible = "microchip,sst25vf016b";
+               spi-max-frequency = <20000000>;
+               reg = <0>;
+diff --git a/arch/arm/boot/dts/imx6sx-sdb-reva.dts b/arch/arm/boot/dts/imx6sx-sdb-reva.dts
+index dce5dcf96c255..7dda42553f4bc 100644
+--- a/arch/arm/boot/dts/imx6sx-sdb-reva.dts
++++ b/arch/arm/boot/dts/imx6sx-sdb-reva.dts
+@@ -123,7 +123,7 @@
+       pinctrl-0 = <&pinctrl_qspi2>;
+       status = "okay";
+ 
+-      flash0: s25fl128s@0 {
++      flash0: flash@0 {
+               reg = <0>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+@@ -133,7 +133,7 @@
+               spi-tx-bus-width = <4>;
+       };
+ 
+-      flash1: s25fl128s@2 {
++      flash1: flash@2 {
+               reg = <2>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts
+index 5a63ca6157229..1b808563a536a 100644
+--- a/arch/arm/boot/dts/imx6sx-sdb.dts
++++ b/arch/arm/boot/dts/imx6sx-sdb.dts
+@@ -108,7 +108,7 @@
+       pinctrl-0 = <&pinctrl_qspi2>;
+       status = "okay";
+ 
+-      flash0: n25q256a@0 {
++      flash0: flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "micron,n25q256a", "jedec,spi-nor";
+@@ -118,7 +118,7 @@
+               reg = <0>;
+       };
+ 
+-      flash1: n25q256a@2 {
++      flash1: flash@2 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "micron,n25q256a", "jedec,spi-nor";
+diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi b/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
+index 64c2d1e9f7fce..71d3c7e05e08f 100644
+--- a/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
++++ b/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
+@@ -239,7 +239,7 @@
+       pinctrl-0 = <&pinctrl_qspi>;
+       status = "okay";
+ 
+-      flash0: n25q256a@0 {
++      flash0: flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "micron,n25q256a", "jedec,spi-nor";
+diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
+index 47d3ce5d255fa..acd936540d898 100644
+--- a/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
++++ b/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
+@@ -19,7 +19,7 @@
+ };
+ 
+ &qspi {
+-      spi-flash@0 {
++      flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-nand";
+diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
+index a095a7654ac65..29ed38dce5802 100644
+--- a/arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
++++ b/arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
+@@ -18,7 +18,7 @@
+ };
+ 
+ &qspi {
+-      spi-flash@0 {
++      flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-nand";
+diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
+index 2a449a3c1ae27..09a83dbdf6510 100644
+--- a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
++++ b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
+@@ -19,7 +19,7 @@
+       pinctrl-0 = <&pinctrl_ecspi2>;
+       status = "okay";
+ 
+-      spi-flash@0 {
++      flash@0 {
+               compatible = "mxicy,mx25v8035f", "jedec,spi-nor";
+               spi-max-frequency = <50000000>;
+               reg = <0>;
+diff --git a/arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi b/arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
+index b7e984284e1ad..d000606c07049 100644
+--- a/arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
++++ b/arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
+@@ -18,7 +18,7 @@
+ };
+ 
+ &qspi {
+-      spi-flash@0 {
++      flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-nand";
+-- 
+2.35.1
+

diff --git a/queue-5.10/arm-dts-imx6qdl-kontron-samx6i-fix-spi-flash-compati.patch b/queue-5.10/arm-dts-imx6qdl-kontron-samx6i-fix-spi-flash-compati.patch
new file mode 100644 (file)
index 0000000..df76759
--- /dev/null
+++ b/queue-5.10/arm-dts-imx6qdl-kontron-samx6i-fix-spi-flash-compati.patch
@@ -0,0 +1,37 @@
+From e8229777597ef55ccec2ea0a8cbcee20576e3be6 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 26 Jul 2022 15:05:22 +0200
+Subject: ARM: dts: imx6qdl-kontron-samx6i: fix spi-flash compatible
+
+From: Marco Felsch <m.felsch@pengutronix.de>
+
+[ Upstream commit af7d78c957017f8b3a0986769f6f18e57f9362ea ]
+
+Drop the "winbond,w25q16dw" compatible since it causes to set the
+MODALIAS to w25q16dw which is not specified within spi-nor id table.
+Fix this by use the common "jedec,spi-nor" compatible.
+
+Fixes: 2125212785c9 ("ARM: dts: imx6qdl-kontron-samx6i: add Kontron SMARC SoM Support")
+Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
+index 02ab8a59df23a..37d94aa45a8b7 100644
+--- a/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
+@@ -249,7 +249,7 @@
+ 
+       /* default boot source: workaround #1 for errata ERR006282 */
+       smarc_flash: flash@0 {
+-              compatible = "winbond,w25q16dw", "jedec,spi-nor";
++              compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <20000000>;
+       };
+-- 
+2.35.1
+

diff --git a/queue-5.10/iommu-vt-d-correctly-calculate-sagaw-value-of-iommu.patch b/queue-5.10/iommu-vt-d-correctly-calculate-sagaw-value-of-iommu.patch
new file mode 100644 (file)
index 0000000..781f343
--- /dev/null
+++ b/queue-5.10/iommu-vt-d-correctly-calculate-sagaw-value-of-iommu.patch
@@ -0,0 +1,77 @@
+From 9e2835c392867b2095fc5c94b2a6eab65fa8b2c3 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 23 Aug 2022 14:15:55 +0800
+Subject: iommu/vt-d: Correctly calculate sagaw value of IOMMU
+
+From: Lu Baolu <baolu.lu@linux.intel.com>
+
+[ Upstream commit 53fc7ad6edf210b497230ce74b61b322a202470c ]
+
+The Intel IOMMU driver possibly selects between the first-level and the
+second-level translation tables for DMA address translation. However,
+the levels of page-table walks for the 4KB base page size are calculated
+from the SAGAW field of the capability register, which is only valid for
+the second-level page table. This causes the IOMMU driver to stop working
+if the hardware (or the emulated IOMMU) advertises only first-level
+translation capability and reports the SAGAW field as 0.
+
+This solves the above problem by considering both the first level and the
+second level when calculating the supported page table levels.
+
+Fixes: b802d070a52a1 ("iommu/vt-d: Use iova over first level")
+Cc: stable@vger.kernel.org
+Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
+Link: https://lore.kernel.org/r/20220817023558.3253263-1-baolu.lu@linux.intel.com
+Signed-off-by: Joerg Roedel <jroedel@suse.de>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/iommu/intel/iommu.c | 28 +++++++++++++++++++++++++---
+ 1 file changed, 25 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
+index 477dde39823c7..93c60712a948e 100644
+--- a/drivers/iommu/intel/iommu.c
++++ b/drivers/iommu/intel/iommu.c
+@@ -560,14 +560,36 @@ static inline int domain_pfn_supported(struct dmar_domain *domain,
+       return !(addr_width < BITS_PER_LONG && pfn >> addr_width);
+ }
+ 
++/*
++ * Calculate the Supported Adjusted Guest Address Widths of an IOMMU.
++ * Refer to 11.4.2 of the VT-d spec for the encoding of each bit of
++ * the returned SAGAW.
++ */
++static unsigned long __iommu_calculate_sagaw(struct intel_iommu *iommu)
++{
++      unsigned long fl_sagaw, sl_sagaw;
++
++      fl_sagaw = BIT(2) | (cap_fl1gp_support(iommu->cap) ? BIT(3) : 0);
++      sl_sagaw = cap_sagaw(iommu->cap);
++
++      /* Second level only. */
++      if (!sm_supported(iommu) || !ecap_flts(iommu->ecap))
++              return sl_sagaw;
++
++      /* First level only. */
++      if (!ecap_slts(iommu->ecap))
++              return fl_sagaw;
++
++      return fl_sagaw & sl_sagaw;
++}
++
+ static int __iommu_calculate_agaw(struct intel_iommu *iommu, int max_gaw)
+ {
+       unsigned long sagaw;
+       int agaw = -1;
+ 
+-      sagaw = cap_sagaw(iommu->cap);
+-      for (agaw = width_to_agaw(max_gaw);
+-           agaw >= 0; agaw--) {
++      sagaw = __iommu_calculate_sagaw(iommu);
++      for (agaw = width_to_agaw(max_gaw); agaw >= 0; agaw--) {
+               if (test_bit(agaw, &sagaw))
+                       break;
+       }
+-- 
+2.35.1
+

diff --git a/queue-5.10/series b/queue-5.10/series
new file mode 100644 (file)
index 0000000..1bb1a6d
--- /dev/null
+++ b/queue-5.10/series
@@ -0,0 +1,4 @@
+arm-dts-imx-align-spi-nor-node-name-with-dtschema.patch
+arm-dts-imx6qdl-kontron-samx6i-fix-spi-flash-compati.patch
+iommu-vt-d-correctly-calculate-sagaw-value-of-iommu.patch
+tracefs-only-clobber-mode-uid-gid-on-remount-if-aske.patch

diff --git a/queue-5.10/tracefs-only-clobber-mode-uid-gid-on-remount-if-aske.patch b/queue-5.10/tracefs-only-clobber-mode-uid-gid-on-remount-if-aske.patch
new file mode 100644 (file)
index 0000000..4615715
--- /dev/null
+++ b/queue-5.10/tracefs-only-clobber-mode-uid-gid-on-remount-if-aske.patch
@@ -0,0 +1,143 @@
+From 9df5a99dae0431dbe84c926ae9bf6ddee2ff0320 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 26 Aug 2022 17:44:17 -0700
+Subject: tracefs: Only clobber mode/uid/gid on remount if asked
+
+From: Brian Norris <briannorris@chromium.org>
+
+[ Upstream commit 47311db8e8f33011d90dee76b39c8886120cdda4 ]
+
+Users may have explicitly configured their tracefs permissions; we
+shouldn't overwrite those just because a second mount appeared.
+
+Only clobber if the options were provided at mount time.
+
+Note: the previous behavior was especially surprising in the presence of
+automounted /sys/kernel/debug/tracing/.
+
+Existing behavior:
+
+  ## Pre-existing status: tracefs is 0755.
+  # stat -c '%A' /sys/kernel/tracing/
+  drwxr-xr-x
+
+  ## (Re)trigger the automount.
+  # umount /sys/kernel/debug/tracing
+  # stat -c '%A' /sys/kernel/debug/tracing/.
+  drwx------
+
+  ## Unexpected: the automount changed mode for other mount instances.
+  # stat -c '%A' /sys/kernel/tracing/
+  drwx------
+
+New behavior (after this change):
+
+  ## Pre-existing status: tracefs is 0755.
+  # stat -c '%A' /sys/kernel/tracing/
+  drwxr-xr-x
+
+  ## (Re)trigger the automount.
+  # umount /sys/kernel/debug/tracing
+  # stat -c '%A' /sys/kernel/debug/tracing/.
+  drwxr-xr-x
+
+  ## Expected: the automount does not change other mount instances.
+  # stat -c '%A' /sys/kernel/tracing/
+  drwxr-xr-x
+
+Link: https://lkml.kernel.org/r/20220826174353.2.Iab6e5ea57963d6deca5311b27fb7226790d44406@changeid
+
+Cc: stable@vger.kernel.org
+Fixes: 4282d60689d4f ("tracefs: Add new tracefs file system")
+Signed-off-by: Brian Norris <briannorris@chromium.org>
+Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ fs/tracefs/inode.c | 31 +++++++++++++++++++++++--------
+ 1 file changed, 23 insertions(+), 8 deletions(-)
+
+diff --git a/fs/tracefs/inode.c b/fs/tracefs/inode.c
+index 8b7315c22f0d1..4b70571368526 100644
+--- a/fs/tracefs/inode.c
++++ b/fs/tracefs/inode.c
+@@ -139,6 +139,8 @@ struct tracefs_mount_opts {
+       kuid_t uid;
+       kgid_t gid;
+       umode_t mode;
++      /* Opt_* bitfield. */
++      unsigned int opts;
+ };
+ 
+ enum {
+@@ -239,6 +241,7 @@ static int tracefs_parse_options(char *data, struct tracefs_mount_opts *opts)
+       kgid_t gid;
+       char *p;
+ 
++      opts->opts = 0;
+       opts->mode = TRACEFS_DEFAULT_MODE;
+ 
+       while ((p = strsep(&data, ",")) != NULL) {
+@@ -273,24 +276,36 @@ static int tracefs_parse_options(char *data, struct tracefs_mount_opts *opts)
+                * but traditionally tracefs has ignored all mount options
+                */
+               }
++
++              opts->opts |= BIT(token);
+       }
+ 
+       return 0;
+ }
+ 
+-static int tracefs_apply_options(struct super_block *sb)
++static int tracefs_apply_options(struct super_block *sb, bool remount)
+ {
+       struct tracefs_fs_info *fsi = sb->s_fs_info;
+       struct inode *inode = sb->s_root->d_inode;
+       struct tracefs_mount_opts *opts = &fsi->mount_opts;
+ 
+-      inode->i_mode &= ~S_IALLUGO;
+-      inode->i_mode |= opts->mode;
++      /*
++       * On remount, only reset mode/uid/gid if they were provided as mount
++       * options.
++       */
++
++      if (!remount || opts->opts & BIT(Opt_mode)) {
++              inode->i_mode &= ~S_IALLUGO;
++              inode->i_mode |= opts->mode;
++      }
+ 
+-      inode->i_uid = opts->uid;
++      if (!remount || opts->opts & BIT(Opt_uid))
++              inode->i_uid = opts->uid;
+ 
+-      /* Set all the group ids to the mount option */
+-      set_gid(sb->s_root, opts->gid);
++      if (!remount || opts->opts & BIT(Opt_gid)) {
++              /* Set all the group ids to the mount option */
++              set_gid(sb->s_root, opts->gid);
++      }
+ 
+       return 0;
+ }
+@@ -305,7 +320,7 @@ static int tracefs_remount(struct super_block *sb, int *flags, char *data)
+       if (err)
+               goto fail;
+ 
+-      tracefs_apply_options(sb);
++      tracefs_apply_options(sb, true);
+ 
+ fail:
+       return err;
+@@ -357,7 +372,7 @@ static int trace_fill_super(struct super_block *sb, void *data, int silent)
+ 
+       sb->s_op = &tracefs_super_operations;
+ 
+-      tracefs_apply_options(sb);
++      tracefs_apply_options(sb, false);
+ 
+       return 0;
+ 
+-- 
+2.35.1
+