#define IWL_BZ_UCODE_API_MAX 99
/* Lowest firmware API version supported */
-#define IWL_BZ_UCODE_API_MIN 93
+#define IWL_BZ_UCODE_API_MIN 94
/* Memory offsets and lengths */
#define IWL_BZ_SMEM_OFFSET 0x400000
#define IWL_DR_UCODE_API_MAX 99
/* Lowest firmware API version supported */
-#define IWL_DR_UCODE_API_MIN 97
+#define IWL_DR_UCODE_API_MIN 98
/* Memory offsets and lengths */
#define IWL_DR_SMEM_OFFSET 0x400000
#define IWL_SC_UCODE_API_MAX 99
/* Lowest firmware API version supported */
-#define IWL_SC_UCODE_API_MIN 97
+#define IWL_SC_UCODE_API_MIN 98
/* NVM versions */
#define IWL_SC_NVM_VERSION 0x0a1d