arm64: zynqmp: Add output-enable pins to SOMs

Now that the zynqmp pinctrl driver supports the tri-state registers, make
sure that the pins requiring output-enable are configured appropriately for
SOMs.

Without it, all tristate setting for MIOs, which are not related to SOM
itself, are using default configuration which is not correct setting.
It means SDs, USBs, ethernet, etc. are not working properly.

In past it was fixed through calling tristate configuration via bootcmd:
usb_init=mw 0xFF180208 2020
kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \
  gpio toggle gpio@ff0a000038

Signed-off-by: Neal Frager <neal.frager@amd.com>
Link: https://lore.kernel.org/r/9270938b48c8939ac5dca4ac2c59f1c4a8c564d8.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
index 92f4190d564db12e127fc102cdb33deee191cdb6..e7940067ff3cbbf20ce2e94b6db6174cc3168a6d 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
@@ -185,6 +185,7 @@
                conf-tx {
                        pins = "MIO36";
                        bias-disable;
+                       output-enable;
                };
 
                mux {
@@ -236,6 +237,7 @@
                conf-bootstrap {
                        pins = "MIO71", "MIO73", "MIO75";
                        bias-disable;
+                       output-enable;
                        low-power-disable;
                };
 
@@ -243,6 +245,7 @@
                        pins = "MIO64", "MIO65", "MIO66",
                                "MIO67", "MIO68", "MIO69";
                        bias-disable;
+                       output-enable;
                        low-power-enable;
                };
 
@@ -251,6 +254,7 @@
                        slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                        bias-disable;
+                       output-enable;
                };
 
                mux-mdio {
@@ -281,6 +285,7 @@
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                        "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       output-enable;
                        drive-strength = <4>;
                        slew-rate = <SLEW_RATE_SLOW>;
                };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
index f88b71f5b07a63fa4ca40ee5c4a91ee516f0125e..f723129262999d23d938004d9fbb8efbf28fd8b0 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
@@ -168,6 +168,7 @@
                conf-tx {
                        pins = "MIO36";
                        bias-disable;
+                       output-enable;
                };
 
                mux {
@@ -219,6 +220,7 @@
                conf-bootstrap {
                        pins = "MIO71", "MIO73", "MIO75";
                        bias-disable;
+                       output-enable;
                        low-power-disable;
                };
 
@@ -226,6 +228,7 @@
                        pins = "MIO64", "MIO65", "MIO66",
                                "MIO67", "MIO68", "MIO69";
                        bias-disable;
+                       output-enable;
                        low-power-enable;
                };
 
@@ -234,6 +237,7 @@
                        slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                        bias-disable;
+                       output-enable;
                };
 
                mux-mdio {
@@ -264,6 +268,7 @@
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                        "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       output-enable;
                        drive-strength = <4>;
                        slew-rate = <SLEW_RATE_SLOW>;
                };