]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
net: stmmac: ingenic: move "MAC PHY control register" debug
authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Fri, 7 Nov 2025 08:29:05 +0000 (08:29 +0000)
committerJakub Kicinski <kuba@kernel.org>
Tue, 11 Nov 2025 01:30:40 +0000 (17:30 -0800)
Move the printing of the MAC PHY control register interface mode
setting into ingenic_set_phy_intf_sel(), and use phy_modes() to
print the string rather than using the enum name.

Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1vHHqD-0000000DjrP-3aaU@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

index 79735a476e86dab7ef5c7469e61d0f46a79f4107..539513890db1fe2a08705e2c8333e3d830644b7e 100644 (file)
@@ -77,22 +77,12 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat,
 
        switch (plat_dat->phy_interface) {
        case PHY_INTERFACE_MODE_MII:
-               dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_MII\n");
-               break;
-
        case PHY_INTERFACE_MODE_GMII:
-               dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_GMII\n");
-               break;
-
        case PHY_INTERFACE_MODE_RMII:
-               dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");
-               break;
-
        case PHY_INTERFACE_MODE_RGMII:
        case PHY_INTERFACE_MODE_RGMII_ID:
        case PHY_INTERFACE_MODE_RGMII_TXID:
        case PHY_INTERFACE_MODE_RGMII_RXID:
-               dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RGMII\n");
                break;
 
        default:
@@ -115,7 +105,6 @@ static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat,
 
        switch (plat_dat->phy_interface) {
        case PHY_INTERFACE_MODE_RMII:
-               dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");
                break;
 
        default:
@@ -136,7 +125,6 @@ static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat,
 
        switch (plat_dat->phy_interface) {
        case PHY_INTERFACE_MODE_RMII:
-               dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");
                break;
 
        default:
@@ -160,7 +148,6 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat,
        switch (plat_dat->phy_interface) {
        case PHY_INTERFACE_MODE_RMII:
                val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII);
-               dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");
                break;
 
        default:
@@ -185,7 +172,6 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat,
        case PHY_INTERFACE_MODE_RMII:
                val = FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) |
                          FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN);
-               dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");
                break;
 
        case PHY_INTERFACE_MODE_RGMII:
@@ -205,7 +191,6 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat,
                        val |= FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_DELAY) |
                                   FIELD_PREP(MACPHYC_RX_DELAY_MASK, (mac->rx_delay + 9750) / 19500 - 1);
 
-               dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RGMII\n");
                break;
 
        default:
@@ -237,6 +222,9 @@ static int ingenic_mac_init(struct platform_device *pdev, void *bsp_priv)
                        return phy_intf_sel < 0 ? phy_intf_sel : -EINVAL;
                }
 
+               dev_dbg(mac->dev, "MAC PHY control register: interface %s\n",
+                       phy_modes(interface));
+
                ret = mac->soc_info->set_mode(mac->plat_dat, phy_intf_sel);
                if (ret)
                        return ret;