riscv: add parsing for Zaamo and Zalrsc extensions

These 2 new extensions are actually a subset of the A extension which
provides atomic memory operations and load-reserved/store-conditional
instructions.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240619153913.867263-3-cleger@rivosinc.com
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>

diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
index 14cc29f2a723cb74cada6c93cace3ebb1a8ee7f7..e3cbf203cdde7fd6803671e126d272adff10e056 100644 (file)
--- a/arch/riscv/include/asm/hwcap.h
+++ b/arch/riscv/include/asm/hwcap.h
@@ -103,6 +103,8 @@
 #define RISCV_ISA_EXT_ZFBFMIN          94
 #define RISCV_ISA_EXT_ZVFBFMIN         95
 #define RISCV_ISA_EXT_ZVFBFWMA         96
+#define RISCV_ISA_EXT_ZAAMO            97
+#define RISCV_ISA_EXT_ZALRSC           98
 
 #define RISCV_ISA_EXT_XLINUXENVCFG     127
 

diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index 6ec9499e2cf27f459cb6e0dcceaa1d3f8994727b..af9c346da96e94508fbb0ff6ff86f94f5d45a8c5 100644 (file)
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -182,6 +182,11 @@ static int riscv_ext_svadu_validate(const struct riscv_isa_ext_data *data,
        return 0;
 }
 
+static const unsigned int riscv_a_exts[] = {
+       RISCV_ISA_EXT_ZAAMO,
+       RISCV_ISA_EXT_ZALRSC,
+};
+
 static const unsigned int riscv_zk_bundled_exts[] = {
        RISCV_ISA_EXT_ZBKB,
        RISCV_ISA_EXT_ZBKC,
@@ -353,7 +358,7 @@ static const unsigned int riscv_c_exts[] = {
 const struct riscv_isa_ext_data riscv_isa_ext[] = {
        __RISCV_ISA_EXT_DATA(i, RISCV_ISA_EXT_i),
        __RISCV_ISA_EXT_DATA(m, RISCV_ISA_EXT_m),
-       __RISCV_ISA_EXT_DATA(a, RISCV_ISA_EXT_a),
+       __RISCV_ISA_EXT_SUPERSET(a, RISCV_ISA_EXT_a, riscv_a_exts),
        __RISCV_ISA_EXT_DATA(f, RISCV_ISA_EXT_f),
        __RISCV_ISA_EXT_DATA(d, RISCV_ISA_EXT_d),
        __RISCV_ISA_EXT_DATA(q, RISCV_ISA_EXT_q),
@@ -373,8 +378,10 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = {
        __RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE),
        __RISCV_ISA_EXT_DATA(zihpm, RISCV_ISA_EXT_ZIHPM),
        __RISCV_ISA_EXT_DATA(zimop, RISCV_ISA_EXT_ZIMOP),
+       __RISCV_ISA_EXT_DATA(zaamo, RISCV_ISA_EXT_ZAAMO),
        __RISCV_ISA_EXT_DATA(zabha, RISCV_ISA_EXT_ZABHA),
        __RISCV_ISA_EXT_DATA(zacas, RISCV_ISA_EXT_ZACAS),
+       __RISCV_ISA_EXT_DATA(zalrsc, RISCV_ISA_EXT_ZALRSC),
        __RISCV_ISA_EXT_DATA(zawrs, RISCV_ISA_EXT_ZAWRS),
        __RISCV_ISA_EXT_DATA(zfa, RISCV_ISA_EXT_ZFA),
        __RISCV_ISA_EXT_DATA_VALIDATE(zfbfmin, RISCV_ISA_EXT_ZFBFMIN, riscv_ext_f_depends),