]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
re PR target/50022 ("incorrect condition in IT block" when building mozilla code...
authorRamana Radhakrishnan <ramana.radhakrishnan@linaro.org>
Mon, 15 Aug 2011 11:57:33 +0000 (11:57 +0000)
committerRamana Radhakrishnan <ramana@gcc.gnu.org>
Mon, 15 Aug 2011 11:57:33 +0000 (11:57 +0000)
2011-08-15  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>

PR target/50022
* config/arm/arm.c (output_move_double): Add 2 parameters
to count the number of insns emitted and whether to emit or not.
Use the flag to decide when to emit and count number of instructions
that will be emitted.
Handle case where output_move_double might be called for calculating
lengths with an invalid constant.
(arm_count_output_move_double_insns): Define.
* config/arm/arm-protos.h (arm_count_output_move_double_insns): Declare.
(output_move_double): Adjust prototype.
* config/arm/vfp.md ("*movdi_vfp"): Adjust call to
output_move_double.
("*movdi_vfp_cortexa8"): Likewise and add attribute
for ce_count.
* config/arm/arm.md ("*arm_movdi"): Adjust call to output_move_double.
("*movdf_soft_insn"): Likewise.
* config/arm/cirrus.md ("*cirrus_arm_movdi"): Likewise.
("*cirrus_thumb2_movdi"): Likewise.
("*thumb2_cirrus_movdf_hard_insn"): Likewise.
("*cirrus_movdf_hard_insn"): Likewise.
* config/arm/neon.md (*neon_mov<mode> VD): Likewise.
* config/arm/iwmmxt.md ("*iwmmxt_arm_movdi"): Likewise.
("mov<mode>_internal VMMX"): Likewise.
* config/arm/fpa.md (*movdf_fpa, *thumb2_movdf_fpa): Likewise.

From-SVN: r177759

gcc/ChangeLog
gcc/config/arm/arm-protos.h
gcc/config/arm/arm.c
gcc/config/arm/arm.md
gcc/config/arm/cirrus.md
gcc/config/arm/fpa.md
gcc/config/arm/iwmmxt.md
gcc/config/arm/neon.md
gcc/config/arm/vfp.md

index 82e79b06944078f215bd95c4000016ab4d37f54d..32162ecd41fbda8c8eb0cc51190d9952fccd635a 100644 (file)
@@ -1,3 +1,30 @@
+2011-08-15  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>
+
+       PR target/50022
+       * config/arm/arm.c (output_move_double): Add 2 parameters
+       to count the number of insns emitted and whether to emit or not.
+       Use the flag to decide when to emit and count number of instructions
+       that will be emitted.
+       Handle case where output_move_double might be called for calculating
+       lengths with an invalid constant.
+       (arm_count_output_move_double_insns): Define.
+       * config/arm/arm-protos.h (arm_count_output_move_double_insns): Declare.
+       (output_move_double): Adjust prototype.
+       * config/arm/vfp.md ("*movdi_vfp"): Adjust call to
+       output_move_double.
+       ("*movdi_vfp_cortexa8"): Likewise and add attribute
+       for ce_count.
+       * config/arm/arm.md ("*arm_movdi"): Adjust call to output_move_double.
+       ("*movdf_soft_insn"): Likewise.
+       * config/arm/cirrus.md ("*cirrus_arm_movdi"): Likewise.
+       ("*cirrus_thumb2_movdi"): Likewise.
+       ("*thumb2_cirrus_movdf_hard_insn"): Likewise.
+       ("*cirrus_movdf_hard_insn"): Likewise.
+       * config/arm/neon.md (*neon_mov<mode> VD): Likewise.
+       * config/arm/iwmmxt.md ("*iwmmxt_arm_movdi"): Likewise.
+       ("mov<mode>_internal VMMX"): Likewise.
+       * config/arm/fpa.md (*movdf_fpa, *thumb2_movdf_fpa): Likewise.
+
 2011-08-14  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/i386.c (ix86_expand_round_sse4): New function.
index 2f7c508cfc5211c647d969240c0a8f380ffaa11a..235370483a1407ea60af75156b4929f27182296d 100644 (file)
@@ -131,8 +131,9 @@ extern const char *output_mov_long_double_arm_from_fpa (rtx *);
 extern const char *output_mov_long_double_arm_from_arm (rtx *);
 extern const char *output_mov_double_fpa_from_arm (rtx *);
 extern const char *output_mov_double_arm_from_fpa (rtx *);
-extern const char *output_move_double (rtx *);
+extern const char *output_move_double (rtx *, bool, int *count);
 extern const char *output_move_quad (rtx *);
+extern int arm_count_output_move_double_insns (rtx *);
 extern const char *output_move_vfp (rtx *operands);
 extern const char *output_move_neon (rtx *operands);
 extern int arm_attr_length_move_neon (rtx);
index afa989e2ba2b77542cbe08f6f7035ccac67c38dc..fc2fd474b7cc3027272a66cdee5fbc97c68a596d 100644 (file)
@@ -13284,11 +13284,24 @@ output_mov_double_arm_from_fpa (rtx *operands)
 /* Output a move between double words.  It must be REG<-MEM
    or MEM<-REG.  */
 const char *
-output_move_double (rtx *operands)
+output_move_double (rtx *operands, bool emit, int *count)
 {
   enum rtx_code code0 = GET_CODE (operands[0]);
   enum rtx_code code1 = GET_CODE (operands[1]);
   rtx otherops[3];
+  if (count)
+    *count = 1;
+
+  /* The only case when this might happen is when 
+     you are looking at the length of a DImode instruction
+     that has an invalid constant in it.  */
+  if (code0 == REG && code1 != MEM)
+    {
+      gcc_assert (!emit);
+      *count = 2;
+      return "";
+    }
+      
 
   if (code0 == REG)
     {
@@ -13301,35 +13314,49 @@ output_move_double (rtx *operands)
       switch (GET_CODE (XEXP (operands[1], 0)))
        {
        case REG:
-         if (TARGET_LDRD
-             && !(fix_cm3_ldrd && reg0 == REGNO(XEXP (operands[1], 0))))
-           output_asm_insn ("ldr%(d%)\t%0, [%m1]", operands);
-         else
-           output_asm_insn ("ldm%(ia%)\t%m1, %M0", operands);
+
+         if (emit)
+           {
+             if (TARGET_LDRD
+                 && !(fix_cm3_ldrd && reg0 == REGNO(XEXP (operands[1], 0))))
+               output_asm_insn ("ldr%(d%)\t%0, [%m1]", operands);
+             else
+               output_asm_insn ("ldm%(ia%)\t%m1, %M0", operands);
+           }
          break;
 
        case PRE_INC:
          gcc_assert (TARGET_LDRD);
-         output_asm_insn ("ldr%(d%)\t%0, [%m1, #8]!", operands);
+         if (emit)
+           output_asm_insn ("ldr%(d%)\t%0, [%m1, #8]!", operands);
+         
          break;
 
        case PRE_DEC:
-         if (TARGET_LDRD)
-           output_asm_insn ("ldr%(d%)\t%0, [%m1, #-8]!", operands);
-         else
-           output_asm_insn ("ldm%(db%)\t%m1!, %M0", operands);
+         if (emit)
+           {
+             if (TARGET_LDRD)
+               output_asm_insn ("ldr%(d%)\t%0, [%m1, #-8]!", operands);
+             else
+               output_asm_insn ("ldm%(db%)\t%m1!, %M0", operands);
+           }
          break;
 
        case POST_INC:
-         if (TARGET_LDRD)
-           output_asm_insn ("ldr%(d%)\t%0, [%m1], #8", operands);
-         else
-           output_asm_insn ("ldm%(ia%)\t%m1!, %M0", operands);
+         
+         if (emit)
+           {
+             if (TARGET_LDRD)
+               output_asm_insn ("ldr%(d%)\t%0, [%m1], #8", operands);
+             else
+               output_asm_insn ("ldm%(ia%)\t%m1!, %M0", operands);
+           }
          break;
 
        case POST_DEC:
          gcc_assert (TARGET_LDRD);
-         output_asm_insn ("ldr%(d%)\t%0, [%m1], #-8", operands);
+         if (emit)
+           output_asm_insn ("ldr%(d%)\t%0, [%m1], #-8", operands);
          break;
 
        case PRE_MODIFY:
@@ -13347,8 +13374,13 @@ output_move_double (rtx *operands)
              if (reg_overlap_mentioned_p (otherops[0], otherops[2]))
                {
                  /* Registers overlap so split out the increment.  */
-                 output_asm_insn ("add%?\t%1, %1, %2", otherops);
-                 output_asm_insn ("ldr%(d%)\t%0, [%1] @split", otherops);
+                 if (emit)
+                   {
+                     output_asm_insn ("add%?\t%1, %1, %2", otherops);
+                     output_asm_insn ("ldr%(d%)\t%0, [%1] @split", otherops);
+                   }
+                 if (count)
+                   *count = 2;
                }
              else
                {
@@ -13359,11 +13391,20 @@ output_move_double (rtx *operands)
                      || GET_CODE (otherops[2]) != CONST_INT
                      || (INTVAL (otherops[2]) > -256
                          && INTVAL (otherops[2]) < 256))
-                   output_asm_insn ("ldr%(d%)\t%0, [%1, %2]!", otherops);
+                   {
+                     if (emit)
+                       output_asm_insn ("ldr%(d%)\t%0, [%1, %2]!", otherops);
+                   }
                  else
                    {
-                     output_asm_insn ("ldr%?\t%0, [%1, %2]!", otherops);
-                     output_asm_insn ("ldr%?\t%H0, [%1, #4]", otherops);
+                     if (emit)
+                       {
+                         output_asm_insn ("ldr%?\t%0, [%1, %2]!", otherops);
+                         output_asm_insn ("ldr%?\t%H0, [%1, #4]", otherops);
+                       }
+                     if (count)
+                       *count = 2;
+
                    }
                }
            }
@@ -13376,11 +13417,19 @@ output_move_double (rtx *operands)
                  || GET_CODE (otherops[2]) != CONST_INT
                  || (INTVAL (otherops[2]) > -256
                      && INTVAL (otherops[2]) < 256))
-               output_asm_insn ("ldr%(d%)\t%0, [%1], %2", otherops);
+               {
+                 if (emit)
+                   output_asm_insn ("ldr%(d%)\t%0, [%1], %2", otherops);
+               }
              else
                {
-                 output_asm_insn ("ldr%?\t%H0, [%1, #4]", otherops);
-                 output_asm_insn ("ldr%?\t%0, [%1], %2", otherops);
+                 if (emit)
+                   {
+                     output_asm_insn ("ldr%?\t%H0, [%1, #4]", otherops);
+                     output_asm_insn ("ldr%?\t%0, [%1], %2", otherops);
+                   }
+                 if (count)
+                   *count = 2;
                }
            }
          break;
@@ -13393,12 +13442,19 @@ output_move_double (rtx *operands)
          /* Use the second register of the pair to avoid problematic
             overlap.  */
          otherops[1] = operands[1];
-         output_asm_insn ("adr%?\t%0, %1", otherops);
+         if (emit)
+           output_asm_insn ("adr%?\t%0, %1", otherops);
          operands[1] = otherops[0];
-         if (TARGET_LDRD)
-           output_asm_insn ("ldr%(d%)\t%0, [%1]", operands);
-         else
-           output_asm_insn ("ldm%(ia%)\t%1, %M0", operands);
+         if (emit)
+           {
+             if (TARGET_LDRD)
+               output_asm_insn ("ldr%(d%)\t%0, [%1]", operands);
+             else
+               output_asm_insn ("ldm%(ia%)\t%1, %M0", operands);
+           }
+
+         if (count)
+           *count = 2;
          break;
 
          /* ??? This needs checking for thumb2.  */
@@ -13417,17 +13473,20 @@ output_move_double (rtx *operands)
                      switch ((int) INTVAL (otherops[2]))
                        {
                        case -8:
-                         output_asm_insn ("ldm%(db%)\t%1, %M0", otherops);
+                         if (emit)
+                           output_asm_insn ("ldm%(db%)\t%1, %M0", otherops);
                          return "";
                        case -4:
                          if (TARGET_THUMB2)
                            break;
-                         output_asm_insn ("ldm%(da%)\t%1, %M0", otherops);
+                         if (emit)
+                           output_asm_insn ("ldm%(da%)\t%1, %M0", otherops);
                          return "";
                        case 4:
                          if (TARGET_THUMB2)
                            break;
-                         output_asm_insn ("ldm%(ib%)\t%1, %M0", otherops);
+                         if (emit)
+                           output_asm_insn ("ldm%(ib%)\t%1, %M0", otherops);
                          return "";
                        }
                    }
@@ -13455,34 +13514,50 @@ output_move_double (rtx *operands)
                      if (reg_overlap_mentioned_p (operands[0], otherops[2])
                          || (fix_cm3_ldrd && reg0 == REGNO (otherops[1])))
                        {
-                         output_asm_insn ("add%?\t%0, %1, %2", otherops);
-                         output_asm_insn ("ldr%(d%)\t%0, [%1]", operands);
+                         if (emit)
+                           {
+                             output_asm_insn ("add%?\t%0, %1, %2", otherops);
+                             output_asm_insn ("ldr%(d%)\t%0, [%1]", operands);
+                           }
+                         if (count)
+                           *count = 2;
                        }
                      else
                        {
                          otherops[0] = operands[0];
-                         output_asm_insn ("ldr%(d%)\t%0, [%1, %2]", otherops);
+                         if (emit)
+                           output_asm_insn ("ldr%(d%)\t%0, [%1, %2]", otherops);
                        }
                      return "";
                    }
 
                  if (GET_CODE (otherops[2]) == CONST_INT)
+                   {                                                   
+                     if (emit)
+                       {
+                         if (!(const_ok_for_arm (INTVAL (otherops[2]))))
+                           output_asm_insn ("sub%?\t%0, %1, #%n2", otherops);
+                         else
+                           output_asm_insn ("add%?\t%0, %1, %2", otherops);
+                       }
+                       
+                   }
+                 else
                    {
-                     if (!(const_ok_for_arm (INTVAL (otherops[2]))))
-                       output_asm_insn ("sub%?\t%0, %1, #%n2", otherops);
-                     else
+                     if (emit)
                        output_asm_insn ("add%?\t%0, %1, %2", otherops);
                    }
-                 else
-                   output_asm_insn ("add%?\t%0, %1, %2", otherops);
                }
              else
-               output_asm_insn ("sub%?\t%0, %1, %2", otherops);
+               {
+                 if (emit)
+                   output_asm_insn ("sub%?\t%0, %1, %2", otherops);
+               }
 
              if (TARGET_LDRD)
                return "ldr%(d%)\t%0, [%1]";
-
-             return "ldm%(ia%)\t%1, %M0";
+             
+               return "ldm%(ia%)\t%1, %M0";
            }
          else
            {
@@ -13490,13 +13565,24 @@ output_move_double (rtx *operands)
              /* Take care of overlapping base/data reg.  */
              if (reg_mentioned_p (operands[0], operands[1]))
                {
-                 output_asm_insn ("ldr%?\t%0, %1", otherops);
-                 output_asm_insn ("ldr%?\t%0, %1", operands);
+                 if (emit)
+                   {
+                     output_asm_insn ("ldr%?\t%0, %1", otherops);
+                     output_asm_insn ("ldr%?\t%0, %1", operands);
+                   }
+                 if (count)
+                   *count = 2;
+
                }
              else
                {
-                 output_asm_insn ("ldr%?\t%0, %1", operands);
-                 output_asm_insn ("ldr%?\t%0, %1", otherops);
+                 if (emit)
+                   {
+                     output_asm_insn ("ldr%?\t%0, %1", operands);
+                     output_asm_insn ("ldr%?\t%0, %1", otherops);
+                   }
+                 if (count)
+                   *count = 2;
                }
            }
        }
@@ -13510,34 +13596,45 @@ output_move_double (rtx *operands)
       switch (GET_CODE (XEXP (operands[0], 0)))
         {
        case REG:
-         if (TARGET_LDRD)
-           output_asm_insn ("str%(d%)\t%1, [%m0]", operands);
-         else
-           output_asm_insn ("stm%(ia%)\t%m0, %M1", operands);
+         if (emit)
+           {
+             if (TARGET_LDRD)
+               output_asm_insn ("str%(d%)\t%1, [%m0]", operands);
+             else
+               output_asm_insn ("stm%(ia%)\t%m0, %M1", operands);
+           }
          break;
 
         case PRE_INC:
          gcc_assert (TARGET_LDRD);
-         output_asm_insn ("str%(d%)\t%1, [%m0, #8]!", operands);
+         if (emit)
+           output_asm_insn ("str%(d%)\t%1, [%m0, #8]!", operands);
          break;
 
         case PRE_DEC:
-         if (TARGET_LDRD)
-           output_asm_insn ("str%(d%)\t%1, [%m0, #-8]!", operands);
-         else
-           output_asm_insn ("stm%(db%)\t%m0!, %M1", operands);
+         if (emit)
+           {
+             if (TARGET_LDRD)
+               output_asm_insn ("str%(d%)\t%1, [%m0, #-8]!", operands);
+             else
+               output_asm_insn ("stm%(db%)\t%m0!, %M1", operands);
+           }
          break;
 
         case POST_INC:
-         if (TARGET_LDRD)
-           output_asm_insn ("str%(d%)\t%1, [%m0], #8", operands);
-         else
-           output_asm_insn ("stm%(ia%)\t%m0!, %M1", operands);
+         if (emit)
+           {
+             if (TARGET_LDRD)
+               output_asm_insn ("str%(d%)\t%1, [%m0], #8", operands);
+             else
+               output_asm_insn ("stm%(ia%)\t%m0!, %M1", operands);
+           }
          break;
 
         case POST_DEC:
          gcc_assert (TARGET_LDRD);
-         output_asm_insn ("str%(d%)\t%1, [%m0], #-8", operands);
+         if (emit)
+           output_asm_insn ("str%(d%)\t%1, [%m0], #-8", operands);
          break;
 
        case PRE_MODIFY:
@@ -13555,19 +13652,35 @@ output_move_double (rtx *operands)
            {
              if (GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY)
                {
-                 output_asm_insn ("str%?\t%0, [%1, %2]!", otherops);
-                 output_asm_insn ("str%?\t%H0, [%1, #4]", otherops);
+                 if (emit)
+                   {
+                     output_asm_insn ("str%?\t%0, [%1, %2]!", otherops);
+                     output_asm_insn ("str%?\t%H0, [%1, #4]", otherops);
+                   }
+                 if (count)
+                   *count = 2;
                }
              else
                {
-                 output_asm_insn ("str%?\t%H0, [%1, #4]", otherops);
-                 output_asm_insn ("str%?\t%0, [%1], %2", otherops);
+                 if (emit)
+                   {
+                     output_asm_insn ("str%?\t%H0, [%1, #4]", otherops);
+                     output_asm_insn ("str%?\t%0, [%1], %2", otherops);
+                   }
+                 if (count)
+                   *count = 2;
                }
            }
          else if (GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY)
-           output_asm_insn ("str%(d%)\t%0, [%1, %2]!", otherops);
+           {
+             if (emit)
+               output_asm_insn ("str%(d%)\t%0, [%1, %2]!", otherops);
+           }
          else
-           output_asm_insn ("str%(d%)\t%0, [%1], %2", otherops);
+           {
+             if (emit)
+               output_asm_insn ("str%(d%)\t%0, [%1], %2", otherops);
+           }
          break;
 
        case PLUS:
@@ -13577,19 +13690,22 @@ output_move_double (rtx *operands)
              switch ((int) INTVAL (XEXP (XEXP (operands[0], 0), 1)))
                {
                case -8:
-                 output_asm_insn ("stm%(db%)\t%m0, %M1", operands);
+                 if (emit)
+                   output_asm_insn ("stm%(db%)\t%m0, %M1", operands);
                  return "";
 
                case -4:
                  if (TARGET_THUMB2)
                    break;
-                 output_asm_insn ("stm%(da%)\t%m0, %M1", operands);
+                 if (emit)
+                   output_asm_insn ("stm%(da%)\t%m0, %M1", operands);
                  return "";
 
                case 4:
                  if (TARGET_THUMB2)
                    break;
-                 output_asm_insn ("stm%(ib%)\t%m0, %M1", operands);
+                 if (emit)
+                   output_asm_insn ("stm%(ib%)\t%m0, %M1", operands);
                  return "";
                }
            }
@@ -13602,7 +13718,8 @@ output_move_double (rtx *operands)
            {
              otherops[0] = operands[1];
              otherops[1] = XEXP (XEXP (operands[0], 0), 0);
-             output_asm_insn ("str%(d%)\t%0, [%1, %2]", otherops);
+             if (emit)
+               output_asm_insn ("str%(d%)\t%0, [%1, %2]", otherops);
              return "";
            }
          /* Fall through */
@@ -13610,8 +13727,14 @@ output_move_double (rtx *operands)
         default:
          otherops[0] = adjust_address (operands[0], SImode, 4);
          otherops[1] = operands[1];
-         output_asm_insn ("str%?\t%1, %0", operands);
-         output_asm_insn ("str%?\t%H1, %0", otherops);
+         if (emit)
+           {
+             output_asm_insn ("str%?\t%1, %0", operands);
+             output_asm_insn ("str%?\t%H1, %0", otherops);
+           }
+         if (count)
+           *count = 2;
+
        }
     }
 
@@ -24205,4 +24328,13 @@ arm_attr_length_push_multi(rtx parallel_op, rtx first_op)
   return 4;
 }
 
+/* Compute the number of instructions emitted by output_move_double.  */
+int
+arm_count_output_move_double_insns (rtx *operands)
+{
+  int count;
+  output_move_double (operands, false, &count);
+  return count;
+}
+
 #include "gt-arm.h"
index 3d4dcfa42a58b94a587a037c7caa838c6c8a9886..4cbd5e563ad582a30a68a4df27ac8210a9522a53 100644 (file)
     case 2:
       return \"#\";
     default:
-      return output_move_double (operands);
+      return output_move_double (operands, true, NULL);
     }
   "
   [(set_attr "length" "8,12,16,8,8")
     case 2:
       return \"#\";
     default:
-      return output_move_double (operands);
+      return output_move_double (operands, true, NULL);
     }
   "
   [(set_attr "length" "8,12,16,8,8")
index f08da0bdca43b65481da105504fef9f908efaef8..bfd2bb852635e3113f7bf431f6de6b4f909991d4 100644 (file)
@@ -1,4 +1,4 @@
-;; Cirrus EP9312 "Maverick" ARM floating point co-processor description.
+;; CIRRUS EP9312 "Maverick" ARM floating point co-processor description.
 ;; Copyright (C) 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
 ;; Contributed by Red Hat.
 ;; Written by Aldy Hernandez (aldyh@redhat.com)
       return \"#\";
     case 1:
     case 2:
-      return output_move_double (operands);
+      return output_move_double (operands, true, NULL);
 
     case 3: return \"cfmv64lr%?\\t%V0, %Q1\;cfmv64hr%?\\t%V0, %R1\";
     case 4: return \"cfmvr64l%?\\t%Q0, %V1\;cfmvr64h%?\\t%R0, %V1\";
     case 0: return \"ldm%?ia\\t%m1, %M0\\t%@ double\";
     case 1: return \"stm%?ia\\t%m0, %M1\\t%@ double\";
     case 2: return \"#\";
-    case 3: case 4: return output_move_double (operands);
+    case 3: case 4: return output_move_double (operands, true, NULL);
     case 5: return \"cfcpyd%?\\t%V0, %V1\";
     case 6: return \"cfldrd%?\\t%V0, %1\";
     case 7: return \"cfmvdlr\\t%V0, %Q1\;cfmvdhr%?\\t%V0, %R1\";
     case 0:
     case 1:
     case 2:
-      return (output_move_double (operands));
+      return (output_move_double (operands, true, NULL));
 
     case 3: return \"cfmv64lr%?\\t%V0, %Q1\;cfmv64hr%?\\t%V0, %R1\";
     case 4: return \"cfmvr64l%?\\t%Q0, %V1\;cfmvr64h%?\\t%R0, %V1\";
     {
     case 0: return \"ldm%?ia\\t%m1, %M0\\t%@ double\";
     case 1: return \"stm%?ia\\t%m0, %M1\\t%@ double\";
-    case 2: case 3: case 4: return output_move_double (operands);
+    case 2: case 3: case 4: return output_move_double (operands, true, NULL);
     case 5: return \"cfcpyd%?\\t%V0, %V1\";
     case 6: return \"cfldrd%?\\t%V0, %1\";
     case 7: return \"cfmvdlr\\t%V0, %Q1\;cfmvdhr%?\\t%V0, %R1\";
index 6e6dd8d43c1cfeed1fdc6abb26f7267a6ad0067f..f2113a98458f849340898bbc8c728d52c4f21b0e 100644 (file)
     case 0: return \"ldm%(ia%)\\t%m1, %M0\\t%@ double\";
     case 1: return \"stm%(ia%)\\t%m0, %M1\\t%@ double\";
     case 2: return \"#\";
-    case 3: case 4: return output_move_double (operands);
+    case 3: case 4: return output_move_double (operands, true, NULL);
     case 5: return \"mvf%?d\\t%0, %1\";
     case 6: return \"mnf%?d\\t%0, #%N1\";
     case 7: return \"ldf%?d\\t%0, %1\";
     default:
     case 0: return \"ldm%(ia%)\\t%m1, %M0\\t%@ double\";
     case 1: return \"stm%(ia%)\\t%m0, %M1\\t%@ double\";
-    case 2: case 3: case 4: return output_move_double (operands);
+    case 2: case 3: case 4: return output_move_double (operands, true, NULL);
     case 5: return \"mvf%?d\\t%0, %1\";
     case 6: return \"mnf%?d\\t%0, #%N1\";
     case 7: return \"ldf%?d\\t%0, %1\";
index 7f13ae49b9ba3091473be0822c442f8bcbc2b928..bc0b80defc958970e0fa11c6a2791938a871a865 100644 (file)
@@ -76,7 +76,7 @@
   switch (which_alternative)
     {
     default:
-      return output_move_double (operands);
+      return output_move_double (operands, true, NULL);
     case 0:
       return \"#\";
     case 3:
    case 3: return \"tmrrc%?\\t%Q0, %R0, %1\";
    case 4: return \"tmcrr%?\\t%0, %Q1, %R1\";
    case 5: return \"#\";
-   default: return output_move_double (operands);
+   default: return output_move_double (operands, true, NULL);
    }"
   [(set_attr "predicable" "yes")
    (set_attr "length"         "4,     4,   4,4,4,8,   8,8")
index 1f9ea676dec6ffe44b363642de59582ebe8ea291..24dd9419bec16646595981d03d7f36e39bdd2904 100644 (file)
     case 2: gcc_unreachable ();
     case 4: return "vmov\t%Q0, %R0, %P1  @ <mode>";
     case 5: return "vmov\t%P0, %Q1, %R1  @ <mode>";
-    default: return output_move_double (operands);
+    default: return output_move_double (operands, true, NULL);
     }
 }
  [(set_attr "neon_type" "neon_int_1,*,neon_vmov,*,neon_mrrc,neon_mcr_2_mcrr,*,*,*")
index 3311ae09e9285e99fef2a5982cff82e67bd1c1f3..991b5174cf8a183a9a7c634c54056b8dc8a9b5dd 100644 (file)
     case 4:
     case 5:
     case 6:
-      return output_move_double (operands);
+      return output_move_double (operands, true, NULL);
     case 7:
       return \"fmdrr%?\\t%P0, %Q1, %R1\\t%@ int\";
     case 8:
     case 4:
     case 5:
     case 6:
-      return output_move_double (operands);
+      return output_move_double (operands, true, NULL);
     case 7:
       return \"fmdrr%?\\t%P0, %Q1, %R1\\t%@ int\";
     case 8:
     }
   "
   [(set_attr "type" "*,*,*,*,load2,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored")
-   (set_attr "length" "4,8,12,16,8,8,8,4,4,4,4,4")
+   (set (attr "length") (cond [(eq_attr "alternative" "1") (const_int 8)
+                               (eq_attr "alternative" "2") (const_int 12)
+                               (eq_attr "alternative" "3") (const_int 16)
+                               (eq_attr "alternative" "4,5,6") 
+                              (symbol_ref 
+                               "arm_count_output_move_double_insns (operands) \
+                                 * 4")]
+                              (const_int 4)))
    (set_attr "predicable"    "yes")
    (set_attr "pool_range"     "*,*,*,*,1020,4096,*,*,*,*,1020,*")
    (set_attr "neg_pool_range" "*,*,*,*,1008,0,*,*,*,*,1008,*")
+   (set (attr "ce_count") 
+       (symbol_ref "get_attr_length (insn) / 4"))
    (set_attr "arch"           "t2,any,any,any,a,t2,any,any,any,any,any,any")]
  )
 
       case 3: case 4:
        return output_move_vfp (operands);
       case 5: case 6:
-       return output_move_double (operands);
+       return output_move_double (operands, true, NULL);
       case 7:
        if (TARGET_VFP_SINGLE)
          return \"fcpys%?\\t%0, %1\;fcpys%?\\t%p0, %p1\";
       case 3: case 4:
        return output_move_vfp (operands);
       case 5: case 6: case 8:
-       return output_move_double (operands);
+       return output_move_double (operands, true, NULL);
       case 7:
        if (TARGET_VFP_SINGLE)
          return \"fcpys%?\\t%0, %1\;fcpys%?\\t%p0, %p1\";