aarch64: Fix wrong code for bfloat when f16 is enabled [PR 111867]

The problem here is when f16 is enabled, movbf_aarch64 accepts `Ufc`
as a constraint:
     [ w        , Ufc ; fconsts     , fp16  ] fmov\t%h0, %1
But that is for fmov values and in this case fmov represents f16 rather than bfloat16 values.
This means we would get the wrong value in the register.

Built and tested for aarch64-linux-gnu with no regressions.  Also tested with `-march=armv9-a+sve2,
gcc.dg/torture/bfloat16-basic.c and gcc.dg/torture/bfloat16-builtin.c no longer fail.

gcc/ChangeLog:

	PR target/111867
	* config/aarch64/aarch64.cc (aarch64_float_const_representable_p): For BFmode,
	only accept +0.0.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index a58b02d8421e0c965a8ae6063d03a392ea8747b3..21a24d92b025e9ffa54b4124932375bdfed48b50 100644 (file)
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -23936,6 +23936,10 @@ aarch64_float_const_representable_p (rtx x)
       || REAL_VALUE_MINUS_ZERO (r))
     return false;
 
+  /* For BFmode, only handle 0.0. */
+  if (GET_MODE (x) == BFmode)
+    return real_iszero (&r, false);
+
   /* Extract exponent.  */
   r = real_value_abs (&r);
   exponent = REAL_EXP (&r);