]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
Fixes for 5.11
authorSasha Levin <sashal@kernel.org>
Sun, 18 Apr 2021 23:19:14 +0000 (19:19 -0400)
committerSasha Levin <sashal@kernel.org>
Sun, 18 Apr 2021 23:19:14 +0000 (19:19 -0400)
Signed-off-by: Sasha Levin <sashal@kernel.org>
queue-5.11/arm-9063-1-mm-reduce-maximum-number-of-cpus-if-debug.patch [new file with mode: 0644]
queue-5.11/arm-9069-1-nommu-fix-conversion-for_each_membock-to-.patch [new file with mode: 0644]
queue-5.11/arm-footbridge-fix-pci-interrupt-mapping.patch [new file with mode: 0644]
queue-5.11/arm-omap2-fix-uninitialized-sr_inst.patch [new file with mode: 0644]
queue-5.11/arm-omap2-fix-warning-for-omap_init_time_of.patch [new file with mode: 0644]
queue-5.11/arm64-dts-allwinner-fix-sd-card-cd-gpio-for-sopine-s.patch [new file with mode: 0644]
queue-5.11/arm64-dts-allwinner-h6-beelink-gs1-remove-ext.-32-kh.patch [new file with mode: 0644]
queue-5.11/bpf-use-correct-permission-flag-for-mixed-signed-bou.patch [new file with mode: 0644]
queue-5.11/series

diff --git a/queue-5.11/arm-9063-1-mm-reduce-maximum-number-of-cpus-if-debug.patch b/queue-5.11/arm-9063-1-mm-reduce-maximum-number-of-cpus-if-debug.patch
new file mode 100644 (file)
index 0000000..d76b268
--- /dev/null
@@ -0,0 +1,100 @@
+From dbdfa69838fb1a4e147ff2c59c99740441997fda Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 17 Feb 2021 20:26:23 +0100
+Subject: ARM: 9063/1: mm: reduce maximum number of CPUs if DEBUG_KMAP_LOCAL is
+ enabled
+
+From: Ard Biesheuvel <ardb@kernel.org>
+
+[ Upstream commit d624833f5984d484c5e3196f34b926f9e71dafee ]
+
+The debugging code for kmap_local() doubles the number of per-CPU fixmap
+slots allocated for kmap_local(), in order to use half of them as guard
+regions. This causes the fixmap region to grow downwards beyond the start
+of its reserved window if the supported number of CPUs is large, and collide
+with the newly added virtual DT mapping right below it, which is obviously
+not good.
+
+One manifestation of this is EFI boot on a kernel built with NR_CPUS=32
+and CONFIG_DEBUG_KMAP_LOCAL=y, which may pass the FDT in highmem, resulting
+in block entries below the fixmap region that the fixmap code misidentifies
+as fixmap table entries, and subsequently tries to dereference using a
+phys-to-virt translation that is only valid for lowmem. This results in a
+cryptic splat such as the one below.
+
+  ftrace: allocating 45548 entries in 89 pages
+  8<--- cut here ---
+  Unable to handle kernel paging request at virtual address fc6006f0
+  pgd = (ptrval)
+  [fc6006f0] *pgd=80000040207003, *pmd=00000000
+  Internal error: Oops: a06 [#1] SMP ARM
+  Modules linked in:
+  CPU: 0 PID: 0 Comm: swapper Not tainted 5.11.0+ #382
+  Hardware name: Generic DT based system
+  PC is at cpu_ca15_set_pte_ext+0x24/0x30
+  LR is at __set_fixmap+0xe4/0x118
+  pc : [<c041ac9c>]    lr : [<c04189d8>]    psr: 400000d3
+  sp : c1601ed8  ip : 00400000  fp : 00800000
+  r10: 0000071f  r9 : 00421000  r8 : 00c00000
+  r7 : 00c00000  r6 : 0000071f  r5 : ffade000  r4 : 4040171f
+  r3 : 00c00000  r2 : 4040171f  r1 : c041ac78  r0 : fc6006f0
+  Flags: nZcv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment none
+  Control: 30c5387d  Table: 40203000  DAC: 00000001
+  Process swapper (pid: 0, stack limit = 0x(ptrval))
+
+So let's limit CONFIG_NR_CPUS to 16 when CONFIG_DEBUG_KMAP_LOCAL=y. Also,
+fix the BUILD_BUG_ON() check that was supposed to catch this, by checking
+whether the region grows below the start address rather than above the end
+address.
+
+Fixes: 2a15ba82fa6ca3f3 ("ARM: highmem: Switch to generic kmap atomic")
+Reported-by: Peter Robinson <pbrobinson@gmail.com>
+Tested-by: Peter Robinson <pbrobinson@gmail.com>
+Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
+Acked-by: Thomas Gleixner <tglx@linutronix.de>
+Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/arm/Kconfig  | 8 +++++++-
+ arch/arm/mm/mmu.c | 3 +--
+ 2 files changed, 8 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
+index 138248999df7..3d2c684eab77 100644
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -1310,9 +1310,15 @@ config KASAN_SHADOW_OFFSET
+ config NR_CPUS
+       int "Maximum number of CPUs (2-32)"
+-      range 2 32
++      range 2 16 if DEBUG_KMAP_LOCAL
++      range 2 32 if !DEBUG_KMAP_LOCAL
+       depends on SMP
+       default "4"
++      help
++        The maximum number of CPUs that the kernel can support.
++        Up to 32 CPUs can be supported, or up to 16 if kmap_local()
++        debugging is enabled, which uses half of the per-CPU fixmap
++        slots as guard regions.
+ config HOTPLUG_CPU
+       bool "Support for hot-pluggable CPUs"
+diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
+index c06ebfbc48c4..56c7954cb626 100644
+--- a/arch/arm/mm/mmu.c
++++ b/arch/arm/mm/mmu.c
+@@ -388,8 +388,7 @@ void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
+       pte_t *pte = pte_offset_fixmap(pmd_off_k(vaddr), vaddr);
+       /* Make sure fixmap region does not exceed available allocation. */
+-      BUILD_BUG_ON(FIXADDR_START + (__end_of_fixed_addresses * PAGE_SIZE) >
+-                   FIXADDR_END);
++      BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) < FIXADDR_START);
+       BUG_ON(idx >= __end_of_fixed_addresses);
+       /* we only support device mappings until pgprot_kernel has been set */
+-- 
+2.30.2
+
diff --git a/queue-5.11/arm-9069-1-nommu-fix-conversion-for_each_membock-to-.patch b/queue-5.11/arm-9069-1-nommu-fix-conversion-for_each_membock-to-.patch
new file mode 100644 (file)
index 0000000..8377634
--- /dev/null
@@ -0,0 +1,84 @@
+From c28b704e1b80f92f7f60c2c676c6e03d99d3ba23 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Thu, 11 Mar 2021 13:32:16 +0100
+Subject: ARM: 9069/1: NOMMU: Fix conversion for_each_membock() to
+ for_each_mem_range()
+
+From: Vladimir Murzin <vladimir.murzin@arm.com>
+
+[ Upstream commit 45c2f70cba3a7eff34574103b2e2b901a5f771aa ]
+
+for_each_mem_range() uses a loop variable, yet looking into code it is
+not just iteration counter but more complex entity which encodes
+information about memblock. Thus condition i == 0 looks fragile.
+Indeed, it broke boot of R-class platforms since it never took i == 0
+path (due to i was set to 1). Fix that with restoring original flag
+check.
+
+Fixes: b10d6bca8720 ("arch, drivers: replace for_each_membock() with for_each_mem_range()")
+Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
+Acked-by: Mike Rapoport <rppt@linux.ibm.com>
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/arm/mm/pmsa-v7.c | 4 +++-
+ arch/arm/mm/pmsa-v8.c | 4 +++-
+ 2 files changed, 6 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mm/pmsa-v7.c b/arch/arm/mm/pmsa-v7.c
+index 88950e41a3a9..59d916ccdf25 100644
+--- a/arch/arm/mm/pmsa-v7.c
++++ b/arch/arm/mm/pmsa-v7.c
+@@ -235,6 +235,7 @@ void __init pmsav7_adjust_lowmem_bounds(void)
+       phys_addr_t mem_end;
+       phys_addr_t reg_start, reg_end;
+       unsigned int mem_max_regions;
++      bool first = true;
+       int num;
+       u64 i;
+@@ -263,7 +264,7 @@ void __init pmsav7_adjust_lowmem_bounds(void)
+ #endif
+       for_each_mem_range(i, &reg_start, &reg_end) {
+-              if (i == 0) {
++              if (first) {
+                       phys_addr_t phys_offset = PHYS_OFFSET;
+                       /*
+@@ -275,6 +276,7 @@ void __init pmsav7_adjust_lowmem_bounds(void)
+                       mem_start = reg_start;
+                       mem_end = reg_end;
+                       specified_mem_size = mem_end - mem_start;
++                      first = false;
+               } else {
+                       /*
+                        * memblock auto merges contiguous blocks, remove
+diff --git a/arch/arm/mm/pmsa-v8.c b/arch/arm/mm/pmsa-v8.c
+index 2de019f7503e..8359748a19a1 100644
+--- a/arch/arm/mm/pmsa-v8.c
++++ b/arch/arm/mm/pmsa-v8.c
+@@ -95,10 +95,11 @@ void __init pmsav8_adjust_lowmem_bounds(void)
+ {
+       phys_addr_t mem_end;
+       phys_addr_t reg_start, reg_end;
++      bool first = true;
+       u64 i;
+       for_each_mem_range(i, &reg_start, &reg_end) {
+-              if (i == 0) {
++              if (first) {
+                       phys_addr_t phys_offset = PHYS_OFFSET;
+                       /*
+@@ -107,6 +108,7 @@ void __init pmsav8_adjust_lowmem_bounds(void)
+                       if (reg_start != phys_offset)
+                               panic("First memory bank must be contiguous from PHYS_OFFSET");
+                       mem_end = reg_end;
++                      first = false;
+               } else {
+                       /*
+                        * memblock auto merges contiguous blocks, remove
+-- 
+2.30.2
+
diff --git a/queue-5.11/arm-footbridge-fix-pci-interrupt-mapping.patch b/queue-5.11/arm-footbridge-fix-pci-interrupt-mapping.patch
new file mode 100644 (file)
index 0000000..f948a66
--- /dev/null
@@ -0,0 +1,98 @@
+From baa70868386a129e072efab416eb73e2c5fdb1e6 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Thu, 25 Mar 2021 10:26:21 +0000
+Subject: ARM: footbridge: fix PCI interrupt mapping
+
+From: Russell King <rmk+kernel@armlinux.org.uk>
+
+[ Upstream commit 30e3b4f256b4e366a61658c294f6a21b8626dda7 ]
+
+Since commit 30fdfb929e82 ("PCI: Add a call to pci_assign_irq() in
+pci_device_probe()"), the PCI code will call the IRQ mapping function
+whenever a PCI driver is probed. If these are marked as __init, this
+causes an oops if a PCI driver is loaded or bound after the kernel has
+initialised.
+
+Fixes: 30fdfb929e82 ("PCI: Add a call to pci_assign_irq() in pci_device_probe()")
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/arm/mach-footbridge/cats-pci.c      | 4 ++--
+ arch/arm/mach-footbridge/ebsa285-pci.c   | 4 ++--
+ arch/arm/mach-footbridge/netwinder-pci.c | 2 +-
+ arch/arm/mach-footbridge/personal-pci.c  | 5 ++---
+ 4 files changed, 7 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/mach-footbridge/cats-pci.c b/arch/arm/mach-footbridge/cats-pci.c
+index 0b2fd7e2e9b4..90b1e9be430e 100644
+--- a/arch/arm/mach-footbridge/cats-pci.c
++++ b/arch/arm/mach-footbridge/cats-pci.c
+@@ -15,14 +15,14 @@
+ #include <asm/mach-types.h>
+ /* cats host-specific stuff */
+-static int irqmap_cats[] __initdata = { IRQ_PCI, IRQ_IN0, IRQ_IN1, IRQ_IN3 };
++static int irqmap_cats[] = { IRQ_PCI, IRQ_IN0, IRQ_IN1, IRQ_IN3 };
+ static u8 cats_no_swizzle(struct pci_dev *dev, u8 *pin)
+ {
+       return 0;
+ }
+-static int __init cats_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
++static int cats_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+ {
+       if (dev->irq >= 255)
+               return -1;      /* not a valid interrupt. */
+diff --git a/arch/arm/mach-footbridge/ebsa285-pci.c b/arch/arm/mach-footbridge/ebsa285-pci.c
+index 6f28aaa9ca79..c3f280d08fa7 100644
+--- a/arch/arm/mach-footbridge/ebsa285-pci.c
++++ b/arch/arm/mach-footbridge/ebsa285-pci.c
+@@ -14,9 +14,9 @@
+ #include <asm/mach/pci.h>
+ #include <asm/mach-types.h>
+-static int irqmap_ebsa285[] __initdata = { IRQ_IN3, IRQ_IN1, IRQ_IN0, IRQ_PCI };
++static int irqmap_ebsa285[] = { IRQ_IN3, IRQ_IN1, IRQ_IN0, IRQ_PCI };
+-static int __init ebsa285_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
++static int ebsa285_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+ {
+       if (dev->vendor == PCI_VENDOR_ID_CONTAQ &&
+           dev->device == PCI_DEVICE_ID_CONTAQ_82C693)
+diff --git a/arch/arm/mach-footbridge/netwinder-pci.c b/arch/arm/mach-footbridge/netwinder-pci.c
+index 9473aa0305e5..e8304392074b 100644
+--- a/arch/arm/mach-footbridge/netwinder-pci.c
++++ b/arch/arm/mach-footbridge/netwinder-pci.c
+@@ -18,7 +18,7 @@
+  * We now use the slot ID instead of the device identifiers to select
+  * which interrupt is routed where.
+  */
+-static int __init netwinder_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
++static int netwinder_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+ {
+       switch (slot) {
+       case 0:  /* host bridge */
+diff --git a/arch/arm/mach-footbridge/personal-pci.c b/arch/arm/mach-footbridge/personal-pci.c
+index 4391e433a4b2..9d19aa98a663 100644
+--- a/arch/arm/mach-footbridge/personal-pci.c
++++ b/arch/arm/mach-footbridge/personal-pci.c
+@@ -14,13 +14,12 @@
+ #include <asm/mach/pci.h>
+ #include <asm/mach-types.h>
+-static int irqmap_personal_server[] __initdata = {
++static int irqmap_personal_server[] = {
+       IRQ_IN0, IRQ_IN1, IRQ_IN2, IRQ_IN3, 0, 0, 0,
+       IRQ_DOORBELLHOST, IRQ_DMA1, IRQ_DMA2, IRQ_PCI
+ };
+-static int __init personal_server_map_irq(const struct pci_dev *dev, u8 slot,
+-      u8 pin)
++static int personal_server_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+ {
+       unsigned char line;
+-- 
+2.30.2
+
diff --git a/queue-5.11/arm-omap2-fix-uninitialized-sr_inst.patch b/queue-5.11/arm-omap2-fix-uninitialized-sr_inst.patch
new file mode 100644 (file)
index 0000000..b80a68c
--- /dev/null
@@ -0,0 +1,35 @@
+From 86264ec46d3b46ae4e312b39158789ce520526ad Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 31 Mar 2021 09:27:41 +0300
+Subject: ARM: OMAP2+: Fix uninitialized sr_inst
+
+From: Tony Lindgren <tony@atomide.com>
+
+[ Upstream commit fc85dc42a38405099f97aa2af709fe9504a82508 ]
+
+Fix uninitialized sr_inst.
+
+Fixes: fbfa463be8dc ("ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data")
+Reported-by: kernel test robot <lkp@intel.com>
+Signed-off-by: Tony Lindgren <tony@atomide.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/arm/mach-omap2/sr_device.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
+index 17b66f0d0dee..605925684b0a 100644
+--- a/arch/arm/mach-omap2/sr_device.c
++++ b/arch/arm/mach-omap2/sr_device.c
+@@ -188,7 +188,7 @@ static const char * const dra7_sr_instances[] = {
+ int __init omap_devinit_smartreflex(void)
+ {
+-      const char * const *sr_inst;
++      const char * const *sr_inst = NULL;
+       int i, nr_sr = 0;
+       if (soc_is_omap44xx()) {
+-- 
+2.30.2
+
diff --git a/queue-5.11/arm-omap2-fix-warning-for-omap_init_time_of.patch b/queue-5.11/arm-omap2-fix-warning-for-omap_init_time_of.patch
new file mode 100644 (file)
index 0000000..35ab1a3
--- /dev/null
@@ -0,0 +1,35 @@
+From da95fcd91285f71db868949abbf552b03a9dfe99 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 24 Mar 2021 12:23:58 +0200
+Subject: ARM: OMAP2+: Fix warning for omap_init_time_of()
+
+From: Tony Lindgren <tony@atomide.com>
+
+[ Upstream commit a3efe3f6d0eb64363f74af4b0e8ba6d19415cef2 ]
+
+Fix warning: no previous prototype for 'omap_init_time_of'.
+
+Fixes: e69b4e1a7577 ("ARM: OMAP2+: Add omap_init_time_of()")
+Reported-by: kernel test robot <lkp@intel.com>
+Signed-off-by: Tony Lindgren <tony@atomide.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/arm/mach-omap2/board-generic.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
+index 7290f033fd2d..1610c567a6a3 100644
+--- a/arch/arm/mach-omap2/board-generic.c
++++ b/arch/arm/mach-omap2/board-generic.c
+@@ -33,7 +33,7 @@ static void __init __maybe_unused omap_generic_init(void)
+ }
+ /* Clocks are needed early, see drivers/clocksource for the rest */
+-void __init __maybe_unused omap_init_time_of(void)
++static void __init __maybe_unused omap_init_time_of(void)
+ {
+       omap_clk_init();
+       timer_probe();
+-- 
+2.30.2
+
diff --git a/queue-5.11/arm64-dts-allwinner-fix-sd-card-cd-gpio-for-sopine-s.patch b/queue-5.11/arm64-dts-allwinner-fix-sd-card-cd-gpio-for-sopine-s.patch
new file mode 100644 (file)
index 0000000..f0111f9
--- /dev/null
@@ -0,0 +1,61 @@
+From 76536ffe6488af8dec8a0df1d3f233698a7e1d2d Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 16 Mar 2021 14:42:19 +0000
+Subject: arm64: dts: allwinner: Fix SD card CD GPIO for SOPine systems
+
+From: Andre Przywara <andre.przywara@arm.com>
+
+[ Upstream commit 3dd4ce4185df6798dcdcc3669bddb35899d7d5e1 ]
+
+Commit 941432d00768 ("arm64: dts: allwinner: Drop non-removable from
+SoPine/LTS SD card") enabled the card detect GPIO for the SOPine module,
+along the way with the Pine64-LTS, which share the same base .dtsi.
+
+However while both boards indeed have a working CD GPIO on PF6, the
+polarity is different: the SOPine modules uses a "push-pull" socket,
+which has an active-high switch, while the Pine64-LTS use the more
+traditional push-push socket and the common active-low switch.
+
+Fix the polarity in the sopine.dtsi, and overwrite it in the LTS
+board .dts, to make the SD card work again on systems using SOPine
+modules.
+
+Fixes: 941432d00768 ("arm64: dts: allwinner: Drop non-removable from SoPine/LTS SD card")
+Reported-by: Ashley <contact@victorianfox.com>
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+Link: https://lore.kernel.org/r/20210316144219.5973-1-andre.przywara@arm.com
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts | 4 ++++
+ arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi    | 2 +-
+ 2 files changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts
+index 302e24be0a31..a1f621b388fe 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts
+@@ -8,3 +8,7 @@
+       compatible = "pine64,pine64-lts", "allwinner,sun50i-r18",
+                    "allwinner,sun50i-a64";
+ };
++
++&mmc0 {
++      cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 push-push switch */
++};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
+index 3402cec87035..df62044ff7a7 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
+@@ -34,7 +34,7 @@
+       vmmc-supply = <&reg_dcdc1>;
+       disable-wp;
+       bus-width = <4>;
+-      cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
++      cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 push-pull switch */
+       status = "okay";
+ };
+-- 
+2.30.2
+
diff --git a/queue-5.11/arm64-dts-allwinner-h6-beelink-gs1-remove-ext.-32-kh.patch b/queue-5.11/arm64-dts-allwinner-h6-beelink-gs1-remove-ext.-32-kh.patch
new file mode 100644 (file)
index 0000000..1b591dd
--- /dev/null
@@ -0,0 +1,52 @@
+From 4b6fc16155b4dd33cfc6d2f71855c2f9871d988e Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 30 Mar 2021 20:42:18 +0200
+Subject: arm64: dts: allwinner: h6: beelink-gs1: Remove ext. 32 kHz osc
+ reference
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Jernej Skrabec <jernej.skrabec@siol.net>
+
+[ Upstream commit 7a2f6e69e9c1060a7a09c1f8322ccb8d942b3078 ]
+
+Although every Beelink GS1 seems to have external 32768 Hz oscillator,
+it works only on one from four tested. There are more reports of RTC
+issues elsewhere, like Armbian forum.
+
+One Beelink GS1 owner read RTC osc status register on Android which
+shipped with the box. Reported value indicated problems with external
+oscillator.
+
+In order to fix RTC and related issues (HDMI-CEC and suspend/resume with
+Crust) on all boards, switch to internal oscillator.
+
+Fixes: 32507b868119 ("arm64: dts: allwinner: h6: Move ext. oscillator to board DTs")
+Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
+Tested-by: Clément Péron <peron.clem@gmail.com>
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+Link: https://lore.kernel.org/r/20210330184218.279738-1-jernej.skrabec@siol.net
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 4 ----
+ 1 file changed, 4 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
+index 7c9dbde645b5..e8163c572dab 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
+@@ -289,10 +289,6 @@
+       vcc-pm-supply = <&reg_aldo1>;
+ };
+-&rtc {
+-      clocks = <&ext_osc32k>;
+-};
+-
+ &spdif {
+       status = "okay";
+ };
+-- 
+2.30.2
+
diff --git a/queue-5.11/bpf-use-correct-permission-flag-for-mixed-signed-bou.patch b/queue-5.11/bpf-use-correct-permission-flag-for-mixed-signed-bou.patch
new file mode 100644 (file)
index 0000000..d7f8772
--- /dev/null
@@ -0,0 +1,38 @@
+From ada57a311774cac2abf35bd8ea0e4e44e0452439 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 23 Mar 2021 08:32:59 +0100
+Subject: bpf: Use correct permission flag for mixed signed bounds arithmetic
+
+From: Daniel Borkmann <daniel@iogearbox.net>
+
+[ Upstream commit 9601148392520e2e134936e76788fc2a6371e7be ]
+
+We forbid adding unknown scalars with mixed signed bounds due to the
+spectre v1 masking mitigation. Hence this also needs bypass_spec_v1
+flag instead of allow_ptr_leaks.
+
+Fixes: 2c78ee898d8f ("bpf: Implement CAP_BPF")
+Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
+Reviewed-by: John Fastabend <john.fastabend@gmail.com>
+Acked-by: Alexei Starovoitov <ast@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ kernel/bpf/verifier.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c
+index 36b81975d9cd..b654174619e5 100644
+--- a/kernel/bpf/verifier.c
++++ b/kernel/bpf/verifier.c
+@@ -5578,7 +5578,7 @@ static int adjust_ptr_min_max_vals(struct bpf_verifier_env *env,
+                       dst, reg_type_str[ptr_reg->type]);
+               return -EACCES;
+       case PTR_TO_MAP_VALUE:
+-              if (!env->allow_ptr_leaks && !known && (smin_val < 0) != (smax_val < 0)) {
++              if (!env->env->bypass_spec_v1 && !known && (smin_val < 0) != (smax_val < 0)) {
+                       verbose(env, "R%d has unknown scalar with mixed signed bounds, pointer arithmetic with it prohibited for !root\n",
+                               off_reg == dst_reg ? dst : src);
+                       return -EACCES;
+-- 
+2.30.2
+
index 40cc45f478b95594258b70c97f73ca5cadc86614..bc253317adbe3d9756ca3ea2699b0228ad1ed79f 100644 (file)
@@ -100,3 +100,11 @@ ch_ktls-fix-device-connection-close.patch
 ch_ktls-tcb-close-causes-tls-connection-failure.patch
 ch_ktls-do-not-send-snd_una-update-to-tcb-in-middle.patch
 gro-ensure-frag0-meets-ip-header-alignment.patch
+arm-omap2-fix-warning-for-omap_init_time_of.patch
+arm-9063-1-mm-reduce-maximum-number-of-cpus-if-debug.patch
+arm-9069-1-nommu-fix-conversion-for_each_membock-to-.patch
+arm-footbridge-fix-pci-interrupt-mapping.patch
+arm-omap2-fix-uninitialized-sr_inst.patch
+arm64-dts-allwinner-fix-sd-card-cd-gpio-for-sopine-s.patch
+arm64-dts-allwinner-h6-beelink-gs1-remove-ext.-32-kh.patch
+bpf-use-correct-permission-flag-for-mixed-signed-bou.patch