]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
target/mips: Convert to tcg_ops restore_state_to_opc
authorRichard Henderson <richard.henderson@linaro.org>
Mon, 24 Oct 2022 10:35:06 +0000 (20:35 +1000)
committerRichard Henderson <richard.henderson@linaro.org>
Wed, 26 Oct 2022 01:11:28 +0000 (11:11 +1000)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
target/mips/cpu.c
target/mips/tcg/tcg-internal.h
target/mips/tcg/translate.c

index da58eb88928e767754fd0906c7cc23b54d29c0ec..e997c1b9cb1d3f3efc5a0f6ffbea1d66cba761b8 100644 (file)
@@ -538,6 +538,7 @@ static const struct SysemuCPUOps mips_sysemu_ops = {
 static const struct TCGCPUOps mips_tcg_ops = {
     .initialize = mips_tcg_init,
     .synchronize_from_tb = mips_cpu_synchronize_from_tb,
+    .restore_state_to_opc = mips_restore_state_to_opc,
 
 #if !defined(CONFIG_USER_ONLY)
     .tlb_fill = mips_cpu_tlb_fill,
index 1d27fa2ff92cc4a803af244d41fddc6d90616cd6..aef032c48dc57e0553b9a4122ae35ce85db36580 100644 (file)
@@ -21,6 +21,9 @@ void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb);
 G_NORETURN void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
                                              MMUAccessType access_type, int mmu_idx,
                                              uintptr_t retaddr);
+void mips_restore_state_to_opc(CPUState *cs,
+                               const TranslationBlock *tb,
+                               const uint64_t *data);
 
 const char *mips_exception_name(int32_t exception);
 
index c3f92ea652b18bed5a9d60ee89fe5b4411edd287..2f2d707a1233d43330266563ae22bd618e711ef1 100644 (file)
@@ -16229,9 +16229,13 @@ void mips_tcg_init(void)
     }
 }
 
-void restore_state_to_opc(CPUMIPSState *env, TranslationBlock *tb,
-                          target_ulong *data)
+void mips_restore_state_to_opc(CPUState *cs,
+                               const TranslationBlock *tb,
+                               const uint64_t *data)
 {
+    MIPSCPU *cpu = MIPS_CPU(cs);
+    CPUMIPSState *env = &cpu->env;
+
     env->active_tc.PC = data[0];
     env->hflags &= ~MIPS_HFLAG_BMASK;
     env->hflags |= data[1];