]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
4.9-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 22 Apr 2018 08:24:10 +0000 (10:24 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 22 Apr 2018 08:24:10 +0000 (10:24 +0200)
added patches:
drm-amdgpu-add-an-atpx-quirk-for-hybrid-laptop.patch
drm-amdgpu-fix-always_valid-bos-multiple-lru-insertions.patch
drm-amdgpu-fix-pcie-lane-width-calculation.patch
drm-radeon-fix-pcie-lane-width-calculation.patch
drm-rockchip-clear-all-interrupts-before-requesting-the-irq.patch

queue-4.9/drm-amdgpu-add-an-atpx-quirk-for-hybrid-laptop.patch [new file with mode: 0644]
queue-4.9/drm-amdgpu-fix-always_valid-bos-multiple-lru-insertions.patch [new file with mode: 0644]
queue-4.9/drm-amdgpu-fix-pcie-lane-width-calculation.patch [new file with mode: 0644]
queue-4.9/drm-radeon-fix-pcie-lane-width-calculation.patch [new file with mode: 0644]
queue-4.9/drm-rockchip-clear-all-interrupts-before-requesting-the-irq.patch [new file with mode: 0644]
queue-4.9/series

diff --git a/queue-4.9/drm-amdgpu-add-an-atpx-quirk-for-hybrid-laptop.patch b/queue-4.9/drm-amdgpu-add-an-atpx-quirk-for-hybrid-laptop.patch
new file mode 100644 (file)
index 0000000..8bafec4
--- /dev/null
@@ -0,0 +1,31 @@
+From 13b40935cf64f59b93cf1c716a2033488e5a228c Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 21 Mar 2018 21:05:46 -0500
+Subject: drm/amdgpu: Add an ATPX quirk for hybrid laptop
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 13b40935cf64f59b93cf1c716a2033488e5a228c upstream.
+
+_PR3 doesn't seem to work properly, use ATPX instead.
+
+Bug: https://bugs.freedesktop.org/show_bug.cgi?id=104064
+Reviewed-by: Huang Rui <ray.huang@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
+@@ -569,6 +569,7 @@ static const struct amdgpu_px_quirk amdg
+       { 0x1002, 0x6900, 0x1002, 0x0124, AMDGPU_PX_QUIRK_FORCE_ATPX },
+       { 0x1002, 0x6900, 0x1028, 0x0812, AMDGPU_PX_QUIRK_FORCE_ATPX },
+       { 0x1002, 0x6900, 0x1028, 0x0813, AMDGPU_PX_QUIRK_FORCE_ATPX },
++      { 0x1002, 0x67DF, 0x1028, 0x0774, AMDGPU_PX_QUIRK_FORCE_ATPX },
+       { 0, 0, 0, 0, 0 },
+ };
diff --git a/queue-4.9/drm-amdgpu-fix-always_valid-bos-multiple-lru-insertions.patch b/queue-4.9/drm-amdgpu-fix-always_valid-bos-multiple-lru-insertions.patch
new file mode 100644 (file)
index 0000000..ee96d0a
--- /dev/null
@@ -0,0 +1,60 @@
+From a20ee0b1f8b42e2568f3a4408003d22b2dfcc706 Mon Sep 17 00:00:00 2001
+From: Bas Nieuwenhuizen <basni@chromium.org>
+Date: Wed, 31 Jan 2018 13:58:55 +0100
+Subject: drm/amdgpu: Fix always_valid bos multiple LRU insertions.
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Bas Nieuwenhuizen <basni@chromium.org>
+
+commit a20ee0b1f8b42e2568f3a4408003d22b2dfcc706 upstream.
+
+If these bos are evicted and are in the validated list
+things blow up, so do not put them in there. Notably,
+that tries to add the bo to the LRU twice, which results
+in a BUG_ON in ttm_bo.c.
+
+While for the bo_list an alternative would be to not allow
+always valid bos in there, that does not work for the user
+fence.
+
+v2: Fixed whitespace issue pointed out by checkpatch.pl
+
+Signed-off-by: Bas Nieuwenhuizen <basni@chromium.org>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c |    6 ++++--
+ drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c      |    2 +-
+ 2 files changed, 5 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
+@@ -201,8 +201,10 @@ void amdgpu_bo_list_get_list(struct amdg
+       for (i = 0; i < list->num_entries; i++) {
+               unsigned priority = list->array[i].priority;
+-              list_add_tail(&list->array[i].tv.head,
+-                            &bucket[priority]);
++              if (!list->array[i].robj->parent)
++                      list_add_tail(&list->array[i].tv.head,
++                                    &bucket[priority]);
++
+               list->array[i].user_pages = NULL;
+       }
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+@@ -519,7 +519,7 @@ static int amdgpu_cs_parser_bos(struct a
+       INIT_LIST_HEAD(&duplicates);
+       amdgpu_vm_get_pd_bo(&fpriv->vm, &p->validated, &p->vm_pd);
+-      if (p->uf_entry.robj)
++      if (p->uf_entry.robj && !p->uf_entry.robj->parent)
+               list_add(&p->uf_entry.tv.head, &p->validated);
+       if (need_mmap_lock)
diff --git a/queue-4.9/drm-amdgpu-fix-pcie-lane-width-calculation.patch b/queue-4.9/drm-amdgpu-fix-pcie-lane-width-calculation.patch
new file mode 100644 (file)
index 0000000..ce7afe2
--- /dev/null
@@ -0,0 +1,42 @@
+From 41212e2fe72b26ded7ed78224d9eab720c2891e2 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 2 Apr 2018 12:29:26 -0500
+Subject: drm/amdgpu: Fix PCIe lane width calculation
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 41212e2fe72b26ded7ed78224d9eab720c2891e2 upstream.
+
+The calculation of the lane widths via ATOM_PPLIB_PCIE_LINK_WIDTH_MASK and
+ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT macros did not increment the resulting
+value, per the comment in pptable.h ("lanes - 1"), and per usage elsewhere.
+Port of the radeon fix to amdgpu.
+
+Acked-by: Christian König <christian.koenig@amd.com>
+Acked-by: Chunming Zhou <david1.zhou@amd.com>
+Bug: https://bugs.freedesktop.org/show_bug.cgi?id=102553
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/si_dpm.c |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
++++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
+@@ -6449,9 +6449,9 @@ static void si_set_pcie_lane_width_in_sm
+ {
+       u32 lane_width;
+       u32 new_lane_width =
+-              (amdgpu_new_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT;
++              ((amdgpu_new_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1;
+       u32 current_lane_width =
+-              (amdgpu_current_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT;
++              ((amdgpu_current_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1;
+       if (new_lane_width != current_lane_width) {
+               amdgpu_set_pcie_lanes(adev, new_lane_width);
diff --git a/queue-4.9/drm-radeon-fix-pcie-lane-width-calculation.patch b/queue-4.9/drm-radeon-fix-pcie-lane-width-calculation.patch
new file mode 100644 (file)
index 0000000..1725be7
--- /dev/null
@@ -0,0 +1,47 @@
+From 85e290d92b4b794d0c758c53007eb4248d385386 Mon Sep 17 00:00:00 2001
+From: Paul Parsons <lost.distance@yahoo.com>
+Date: Sat, 2 Apr 2016 12:32:30 +0100
+Subject: drm/radeon: Fix PCIe lane width calculation
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Paul Parsons <lost.distance@yahoo.com>
+
+commit 85e290d92b4b794d0c758c53007eb4248d385386 upstream.
+
+Two years ago I tried an AMD Radeon E8860 embedded GPU with the drm driver.
+The dmesg output included driver warnings about an invalid PCIe lane width.
+Tracking the problem back led to si_set_pcie_lane_width_in_smc().
+The calculation of the lane widths via ATOM_PPLIB_PCIE_LINK_WIDTH_MASK and
+ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT macros did not increment the resulting
+value, per the comment in pptable.h ("lanes - 1"), and per usage elsewhere.
+Applying the increment silenced the warnings.
+The code has not changed since, so either my analysis was incorrect or the
+bug has gone unnoticed. Hence submitting this as an RFC.
+
+Acked-by: Christian König <christian.koenig@amd.com>
+Acked-by: Chunming Zhou <david1.zhou@amd.com>
+Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/si_dpm.c |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/si_dpm.c
++++ b/drivers/gpu/drm/radeon/si_dpm.c
+@@ -5969,9 +5969,9 @@ static void si_set_pcie_lane_width_in_sm
+ {
+       u32 lane_width;
+       u32 new_lane_width =
+-              (radeon_new_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT;
++              ((radeon_new_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1;
+       u32 current_lane_width =
+-              (radeon_current_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT;
++              ((radeon_current_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1;
+       if (new_lane_width != current_lane_width) {
+               radeon_set_pcie_lanes(rdev, new_lane_width);
diff --git a/queue-4.9/drm-rockchip-clear-all-interrupts-before-requesting-the-irq.patch b/queue-4.9/drm-rockchip-clear-all-interrupts-before-requesting-the-irq.patch
new file mode 100644 (file)
index 0000000..06fb5bd
--- /dev/null
@@ -0,0 +1,86 @@
+From 5f9e93fed4d45e9a8f84728aff1a8f2ab8922902 Mon Sep 17 00:00:00 2001
+From: Marc Zyngier <marc.zyngier@arm.com>
+Date: Tue, 20 Feb 2018 13:01:18 +0000
+Subject: drm/rockchip: Clear all interrupts before requesting the IRQ
+
+From: Marc Zyngier <marc.zyngier@arm.com>
+
+commit 5f9e93fed4d45e9a8f84728aff1a8f2ab8922902 upstream.
+
+Calling request_irq() followed by disable_irq() is usually a bad idea,
+specially if the interrupt can be pending, and you're not yet in a
+position to handle it.
+
+This is exactly what happens on my kevin system when rebooting in a
+second kernel using kexec: Some interrupt is left pending from
+the previous kernel, and we take it too early, before disable_irq()
+could do anything.
+
+Let's clear the pending interrupts as we initialize the HW, and move
+the interrupt request after that point. This ensures that we're in
+a sane state when the interrupt is requested.
+
+Cc: stable@vger.kernel.org
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+[adapted to recent rockchip-drm changes]
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+Link: https://patchwork.freedesktop.org/patch/msgid/20180220130120.5254-2-marc.zyngier@arm.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/rockchip/rockchip_drm_vop.c |   23 ++++++++++++-----------
+ 1 file changed, 12 insertions(+), 11 deletions(-)
+
+--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
++++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+@@ -1386,6 +1386,9 @@ static int vop_initial(struct vop *vop)
+       usleep_range(10, 20);
+       reset_control_deassert(ahb_rst);
++      VOP_INTR_SET_TYPE(vop, clear, INTR_MASK, 1);
++      VOP_INTR_SET_TYPE(vop, enable, INTR_MASK, 0);
++
+       memcpy(vop->regsbak, vop->regs, vop->len);
+       for (i = 0; i < vop_data->table_size; i++)
+@@ -1541,17 +1544,9 @@ static int vop_bind(struct device *dev,
+       mutex_init(&vop->vsync_mutex);
+-      ret = devm_request_irq(dev, vop->irq, vop_isr,
+-                             IRQF_SHARED, dev_name(dev), vop);
+-      if (ret)
+-              return ret;
+-
+-      /* IRQ is initially disabled; it gets enabled in power_on */
+-      disable_irq(vop->irq);
+-
+       ret = vop_create_crtc(vop);
+       if (ret)
+-              goto err_enable_irq;
++              return ret;
+       pm_runtime_enable(&pdev->dev);
+@@ -1561,13 +1556,19 @@ static int vop_bind(struct device *dev,
+               goto err_disable_pm_runtime;
+       }
++      ret = devm_request_irq(dev, vop->irq, vop_isr,
++                             IRQF_SHARED, dev_name(dev), vop);
++      if (ret)
++              goto err_disable_pm_runtime;
++
++      /* IRQ is initially disabled; it gets enabled in power_on */
++      disable_irq(vop->irq);
++
+       return 0;
+ err_disable_pm_runtime:
+       pm_runtime_disable(&pdev->dev);
+       vop_destroy_crtc(vop);
+-err_enable_irq:
+-      enable_irq(vop->irq); /* To balance out the disable_irq above */
+       return ret;
+ }
index 766e5420c059dfcc4ac147cc56d5836814baf16e..e2efe652ad5a9d10ee53969c50af77258d1bff85 100644 (file)
@@ -63,3 +63,8 @@ alsa-pcm-return-ebusy-for-oss-ioctls-changing-busy-streams.patch
 alsa-pcm-fix-mutex-unbalance-in-oss-emulation-ioctls.patch
 alsa-pcm-fix-endless-loop-for-xrun-recovery-in-oss-emulation.patch
 ext4-don-t-allow-r-w-mounts-if-metadata-blocks-overlap-the-superblock.patch
+drm-amdgpu-add-an-atpx-quirk-for-hybrid-laptop.patch
+drm-amdgpu-fix-always_valid-bos-multiple-lru-insertions.patch
+drm-amdgpu-fix-pcie-lane-width-calculation.patch
+drm-rockchip-clear-all-interrupts-before-requesting-the-irq.patch
+drm-radeon-fix-pcie-lane-width-calculation.patch