Backport addition of scv and rfscv P9 instructions.

opcodes/
	Apply from master.
	2017-02-10  Nicholas Piggin  <npiggin@gmail.com>

	* ppc-opc.c (powerpc_opcodes) <scv, rfscv>: New mnemonics.

gas/
	Apply from master.
	2017-02-10  Nicholas Piggin  <npiggin@gmail.com>

	* testsuite/gas/ppc/power9.d <scv, rfscv>: New tests.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2f783e5e92e83ef37a7c20dfac0b0afa9f1ae44a..5761c773a55d5009f202d3c4c2b6e06a04bdfb5b 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2017-02-28  Peter Bergner <bergner@vnet.ibm.com>
+
+       Apply from master.
+       2017-02-10  Nicholas Piggin  <npiggin@gmail.com>
+
+       * testsuite/gas/ppc/power9.d <scv, rfscv>: New tests.
+
 2016-09-16  Peter Bergner <bergner@vnet.ibm.com>
 
        Apply from master.

diff --git a/gas/testsuite/gas/ppc/power9.d b/gas/testsuite/gas/ppc/power9.d
index 4da740dfb5c8e281d177fa96fdd833d5f12d45c2..8e2f2518f8c6433699361dec4b129cd4c573cc12 100644 (file)
--- a/gas/testsuite/gas/ppc/power9.d
+++ b/gas/testsuite/gas/ppc/power9.d
@@ -389,4 +389,7 @@ Disassembly of section \.text:
 .*:    (ff d7 04 8e|8e 04 d7 ff)       mffscrni f30,0
 .*:    (ff d7 1c 8e|8e 1c d7 ff)       mffscrni f30,3
 .*:    (ff f8 04 8e|8e 04 f8 ff)       mffsl   f31
+.*:    (01 00 00 44|44 00 00 01)       scv     0
+.*:    (e1 0f 00 44|44 00 0f e1)       scv     127
+.*:    (a4 00 00 4c|4c 00 00 a4)       rfscv
 #pass

diff --git a/gas/testsuite/gas/ppc/power9.s b/gas/testsuite/gas/ppc/power9.s
index 5fcf4a79189e2565e2b409467d0bbf32ff79e06d..45f7b5b6d47f927ddf892a4e77045c947df5e842 100644 (file)
--- a/gas/testsuite/gas/ppc/power9.s
+++ b/gas/testsuite/gas/ppc/power9.s
@@ -380,3 +380,6 @@ power9:
        mffscrni    30,0
        mffscrni    30,3
        mffsl       31
+       scv         0
+       scv         127
+       rfscv

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d384e52462ae20e9e0ebdb122110e24cd6ddefee..1a22b34f918550d7370edd66245b16598c9076d7 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2017-02-28  Peter Bergner <bergner@vnet.ibm.com>
+
+       Apply from master.
+       2017-02-10  Nicholas Piggin  <npiggin@gmail.com>
+
+       * ppc-opc.c (powerpc_opcodes) <scv, rfscv>: New mnemonics.
+
 2016-09-16  Peter Bergner <bergner@vnet.ibm.com>
 
        Apply from master.

diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 1e4cb6f533705fa0503f88925628f53ec82a6801..8190195f1f1da5f4c0734ed902124cb63c6b27dd 100644 (file)
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -440,7 +440,7 @@ const struct powerpc_operand powerpc_operands[] =
 #define L1 L0 + 1
   { 0x1, 21, insert_l1, extract_l1, 0 },
 
-  /* The LEV field in a POWER SVC form instruction.  */
+  /* The LEV field in a POWER SVC / POWER9 SCV form instruction.  */
 #define SVC_LEV L1 + 1
   { 0x7f, 5, NULL, NULL, 0 },
 
@@ -4178,6 +4178,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 {"bcla",       B(16,1,1),      B_MASK,      COM,       PPCNONE,        {BO, BI, BDA}},
 
 {"svc",                SC(17,0,0),     SC_MASK,     POWER,     PPCNONE,        {SVC_LEV, FL1, FL2}},
+{"scv",                SC(17,0,1),     SC_MASK,     POWER9,    PPCNONE,        {SVC_LEV}},
 {"svcl",       SC(17,0,1),     SC_MASK,     POWER,     PPCNONE,        {SVC_LEV, FL1, FL2}},
 {"sc",         SC(17,1,0),     SC_MASK,     PPC,       PPCNONE,        {LEV}},
 {"svca",       SC(17,1,0),     SC_MASK,     PWRCOM,    PPCNONE,        {SV}},
@@ -4427,6 +4428,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 {"rfi",                XL(19,50),      0xffffffff,  COM,       PPCNONE,        {0}},
 {"rfci",       XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300|PPCA2|PPC476, PPCNONE, {0}},
 
+{"rfscv",      XL(19,82),      0xffffffff,  POWER9,    PPCNONE,        {0}},
 {"rfsvc",      XL(19,82),      0xffffffff,  POWER,     PPCNONE,        {0}},
 
 {"rfgi",       XL(19,102),   0xffffffff, E500MC|PPCA2, PPCNONE,        {0}},