arm64: dts: qcom: sdx75: Add SDHCI node

Add sdhc node for SDX75 SoC to support SD card.
Also add pins required for SDHCI.

Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com>
Link: https://lore.kernel.org/r/20240523120337.9530-3-quic_nainmeht@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index 2939492cfd50dab5d689f2ea0a6da3194be01838..9fe0a300e42fbc6e38d91deca7345661b67f4d71 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -8,6 +8,7 @@
 
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interconnect/qcom,icc.h>
 #include <dt-bindings/interconnect/qcom,sdx75.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -588,6 +589,54 @@
                        reg = <0x0 0x01fc0000 0x0 0x30000>;
                };
 
+               sdhc: mmc@8804000 {
+                       compatible = "qcom,sdx75-sdhci", "qcom,sdhci-msm-v5";
+                       reg = <0x0 0x08804000 0x0 0x1000>;
+
+                       interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "hc_irq",
+                                         "pwr_irq";
+
+                       clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+                                <&gcc GCC_SDCC1_APPS_CLK>,
+                                <&rpmhcc RPMH_CXO_CLK>;
+                       clock-names = "iface",
+                                     "core",
+                                     "xo";
+                       iommus = <&apps_smmu 0x00a0 0x0>;
+                       qcom,dll-config = <0x0007442c>;
+                       qcom,ddr-config = <0x80040868>;
+                       power-domains = <&rpmhpd RPMHPD_CX>;
+                       operating-points-v2 = <&sdhc1_opp_table>;
+
+                       interconnects = <&system_noc MASTER_SDCC_1 &mc_virt SLAVE_EBI1>,
+                                       <&gem_noc MASTER_APPSS_PROC &system_noc SLAVE_SDCC_1>;
+                       interconnect-names = "sdhc-ddr",
+                                            "cpu-sdhc";
+                       bus-width = <4>;
+                       dma-coherent;
+
+                       /* Forbid SDR104/SDR50 - broken hw! */
+                       sdhci-caps-mask = <0x3 0>;
+
+                       status = "disabled";
+
+                       sdhc1_opp_table: opp-table {
+                               compatible = "operating-points-v2";
+
+                               opp-100000000 {
+                                       opp-hz = /bits/ 64 <100000000>;
+                                       required-opps = <&rpmhpd_opp_low_svs>;
+                               };
+
+                               opp-384000000 {
+                                       opp-hz = /bits/ 64 <384000000>;
+                                       required-opps = <&rpmhpd_opp_nom>;
+                               };
+                       };
+               };
+
                usb: usb@a6f8800 {
                        compatible = "qcom,sdx75-dwc3", "qcom,dwc3";
                        reg = <0x0 0x0a6f8800 0x0 0x400>;
@@ -744,6 +793,46 @@
                                drive-strength = <2>;
                                bias-pull-down;
                        };
+
+                       sdc1_default: sdc1-default-state {
+                               clk-pins {
+                                       pins = "sdc1_clk";
+                                       drive-strength = <16>;
+                                       bias-disable;
+                               };
+
+                               cmd-pins {
+                                       pins = "sdc1_cmd";
+                                       drive-strength = <10>;
+                                       bias-pull-up;
+                               };
+
+                               data-pins {
+                                       pins = "sdc1_data";
+                                       drive-strength = <10>;
+                                       bias-pull-up;
+                               };
+                       };
+
+                       sdc1_sleep: sdc1-sleep-state {
+                               clk-pins {
+                                       pins = "sdc1_clk";
+                                       drive-strength = <2>;
+                                       bias-disable;
+                               };
+
+                               cmd-pins {
+                                       pins = "sdc1_cmd";
+                                       drive-strength = <2>;
+                                       bias-pull-up;
+                               };
+
+                               data-pins {
+                                       pins = "sdc1_data";
+                                       drive-strength = <2>;
+                                       bias-pull-up;
+                               };
+                       };
                };
 
                apps_smmu: iommu@15000000 {