drm/amd/display: Implement new backlight_level_params structure

[Why]
Implement the new backlight_level_params structure as part of the VBAC
framework, the information in this structure is needed to be passed down
to the DMCUB to identify the backlight control type, to adjust the
backlight of the panel and to perform any required conversions from PWM
to nits or vice versa.

[How]
Modified existing functions to include the new backlight_level_params
structure.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Kaitlyn Tse <Kaitlyn.Tse@amd.com>
Signed-off-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 9876f4836ee0e3032f1b84406a8fb700942d60e3..7cfa0c91e7485c5a4f12620cc029b0a57bc3b20f 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4640,7 +4640,12 @@ static void amdgpu_dm_backlight_set_level(struct amdgpu_display_manager *dm,
                if (!rc)
                        DRM_DEBUG("DM: Failed to update backlight via AUX on eDP[%d]\n", bl_idx);
        } else {
-               rc = dc_link_set_backlight_level(link, brightness, 0);
+               struct set_backlight_level_params backlight_level_params = { 0 };
+
+               backlight_level_params.backlight_pwm_u16_16 = brightness;
+               backlight_level_params.transition_time_in_ms = 0;
+
+               rc = dc_link_set_backlight_level(link, &backlight_level_params);
                if (!rc)
                        DRM_DEBUG("DM: Failed to update backlight on eDP[%d]\n", bl_idx);
        }

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_exports.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_exports.c
index dfdfe22d9e85107e3cf07e5459ccca86a7b96d66..457d60eeb486c228fde050b206fbe1c9043cdd33 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_exports.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_exports.c
@@ -430,11 +430,10 @@ bool dc_link_get_backlight_level_nits(struct dc_link *link,
 }
 
 bool dc_link_set_backlight_level(const struct dc_link *link,
-               uint32_t backlight_pwm_u16_16,
-               uint32_t frame_ramp)
+               struct set_backlight_level_params *backlight_level_params)
 {
        return link->dc->link_srv->edp_set_backlight_level(link,
-                       backlight_pwm_u16_16, frame_ramp);
+                       backlight_level_params);
 }
 
 bool dc_link_set_backlight_level_nits(struct dc_link *link,

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 76130bbf2fe4b5e306d2786a7a24810c539cea85..5cb58ca77890476a1ab49645086f5fe8caa8413a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -225,6 +225,7 @@ struct dc_dmub_caps {
        bool subvp_psr;
        bool gecc_enable;
        uint8_t fams_ver;
+       bool aux_backlight_support;
 };
 
 struct dc_scl_caps {
@@ -2210,8 +2211,7 @@ void dc_link_edp_panel_backlight_power_on(struct dc_link *link,
  * and 16 bit fractional, where 1.0 is max backlight value.
  */
 bool dc_link_set_backlight_level(const struct dc_link *dc_link,
-               uint32_t backlight_pwm_u16_16,
-               uint32_t frame_ramp);
+               struct set_backlight_level_params *backlight_level_params);
 
 /* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
 bool dc_link_set_backlight_level_nits(struct dc_link *link,

diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index f0776484abb752a3ca5e6eaccf06e5c4b638c038..1fd030e3f4be9cdde27da233d455d06a2e2e112e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -1303,4 +1303,31 @@ struct dc_commit_streams_params {
        enum dc_power_source_type power_source;
 };
 
+struct set_backlight_level_params {
+       /* backlight in pwm */
+       uint32_t backlight_pwm_u16_16;
+       /* brightness ramping */
+       uint32_t frame_ramp;
+       /* backlight control type
+        * 0: PWM backlight control
+        * 1: VESA AUX backlight control
+        * 2: AMD AUX backlight control
+        */
+       enum backlight_control_type control_type;
+       /* backlight in millinits */
+       uint32_t backlight_millinits;
+       /* transition time in ms */
+       uint32_t transition_time_in_ms;
+       /* minimum luminance in nits */
+       uint32_t min_luminance;
+       /* maximum luminance in nits */
+       uint32_t max_luminance;
+       /* minimum backlight in pwm */
+       uint32_t min_backlight_pwm;
+       /* maximum backlight in pwm */
+       uint32_t max_backlight_pwm;
+       /* AUX HW instance */
+       uint8_t aux_inst;
+};
+
 #endif /* DC_TYPES_H_ */

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
index 427fd6ea062a198e58f9c1930b4215275dce5900..81f4c386c287517eddef9a6801bbfc1589401d49 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
@@ -3143,10 +3143,10 @@ static void dce110_set_cursor_attribute(struct pipe_ctx *pipe_ctx)
 }
 
 bool dce110_set_backlight_level(struct pipe_ctx *pipe_ctx,
-       struct set_backlight_level_params *params)
+       struct set_backlight_level_params *backlight_level_params)
 {
-       uint32_t backlight_pwm_u16_16 = params->backlight_pwm_u16_16;
-       uint32_t frame_ramp = params->frame_ramp;
+       uint32_t backlight_pwm_u16_16 = backlight_level_params->backlight_pwm_u16_16;
+       uint32_t frame_ramp = backlight_level_params->frame_ramp;
        struct dc_link *link = pipe_ctx->stream->link;
        struct dc  *dc = link->ctx->dc;
        struct abm *abm = pipe_ctx->stream_res.abm;

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c
index 630e05f32c806554a3c3f810e7199725b9cacdab..61efb15572ff0d474891cf5340990352bb768956 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c
@@ -137,7 +137,7 @@ void dcn21_PLAT_58856_wa(struct dc_state *context, struct pipe_ctx *pipe_ctx)
        pipe_ctx->stream->dpms_off = true;
 }
 
-static bool dmub_abm_set_pipe(struct abm *abm, uint32_t otg_inst,
+bool dcn21_dmub_abm_set_pipe(struct abm *abm, uint32_t otg_inst,
                uint32_t option, uint32_t panel_inst, uint32_t pwrseq_inst)
 {
        union dmub_rb_cmd cmd;
@@ -199,7 +199,7 @@ void dcn21_set_abm_immediate_disable(struct pipe_ctx *pipe_ctx)
                        abm->funcs->set_pipe_ex(abm, otg_inst, SET_ABM_PIPE_IMMEDIATELY_DISABLE,
                                        panel_cntl->inst, panel_cntl->pwrseq_inst);
                } else {
-                               dmub_abm_set_pipe(abm,
+                       dcn21_dmub_abm_set_pipe(abm,
                                                otg_inst,
                                                SET_ABM_PIPE_IMMEDIATELY_DISABLE,
                                                panel_cntl->inst,
@@ -234,7 +234,7 @@ void dcn21_set_pipe(struct pipe_ctx *pipe_ctx)
                                        panel_cntl->inst,
                                        panel_cntl->pwrseq_inst);
        } else {
-               dmub_abm_set_pipe(abm, otg_inst,
+                       dcn21_dmub_abm_set_pipe(abm, otg_inst,
                                  SET_ABM_PIPE_NORMAL,
                                  panel_cntl->inst,
                                  panel_cntl->pwrseq_inst);
@@ -242,15 +242,15 @@ void dcn21_set_pipe(struct pipe_ctx *pipe_ctx)
 }
 
 bool dcn21_set_backlight_level(struct pipe_ctx *pipe_ctx,
-       struct set_backlight_level_params *params)
+       struct set_backlight_level_params *backlight_level_params)
 {
        struct dc_context *dc = pipe_ctx->stream->ctx;
        struct abm *abm = pipe_ctx->stream_res.abm;
        struct timing_generator *tg = pipe_ctx->stream_res.tg;
        struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl;
        uint32_t otg_inst;
-       uint32_t backlight_pwm_u16_16 = params->backlight_pwm_u16_16;
-       uint32_t frame_ramp = params->frame_ramp;
+       uint32_t backlight_pwm_u16_16 = backlight_level_params->backlight_pwm_u16_16;
+       uint32_t frame_ramp = backlight_level_params->frame_ramp;
 
        if (!abm || !tg || !panel_cntl)
                return false;
@@ -258,7 +258,7 @@ bool dcn21_set_backlight_level(struct pipe_ctx *pipe_ctx,
        otg_inst = tg->inst;
 
        if (dc->dc->res_pool->dmcu) {
-               dce110_set_backlight_level(pipe_ctx, params);
+               dce110_set_backlight_level(pipe_ctx, backlight_level_params);
                return true;
        }
 
@@ -269,7 +269,7 @@ bool dcn21_set_backlight_level(struct pipe_ctx *pipe_ctx,
                                        panel_cntl->inst,
                                        panel_cntl->pwrseq_inst);
        } else {
-               dmub_abm_set_pipe(abm,
+                       dcn21_dmub_abm_set_pipe(abm,
                                  otg_inst,
                                  SET_ABM_PIPE_NORMAL,
                                  panel_cntl->inst,

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.h b/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.h
index a7eaaa4596be4619ae3cf20bed1df293494fc124..f72a27ac1bf1b3fa3ff26927f5c9ef88cdf34bd1 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.h
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.h
@@ -47,6 +47,8 @@ void dcn21_optimize_pwr_state(
 void dcn21_PLAT_58856_wa(struct dc_state *context,
                struct pipe_ctx *pipe_ctx);
 
+bool dcn21_dmub_abm_set_pipe(struct abm *abm, uint32_t otg_inst,
+       uint32_t option, uint32_t panel_inst, uint32_t pwrseq_inst);
 void dcn21_set_pipe(struct pipe_ctx *pipe_ctx);
 void dcn21_set_abm_immediate_disable(struct pipe_ctx *pipe_ctx);
 bool dcn21_set_backlight_level(struct pipe_ctx *pipe_ctx,

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
index bfc78a42bc2a764660eab885942dadadd19ee070..036cb7e9b5bb5ccbaedd0362dacd804778157865 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
@@ -47,9 +47,11 @@
 #include "dce/dmub_outbox.h"
 #include "link.h"
 #include "dcn10/dcn10_hwseq.h"
+#include "dcn21/dcn21_hwseq.h"
 #include "inc/link_enc_cfg.h"
 #include "dcn30/dcn30_vpg.h"
 #include "dce/dce_i2c_hw.h"
+#include "dce/dmub_abm_lcd.h"
 
 #define DC_LOGGER_INIT(logger)
 
@@ -638,3 +640,50 @@ void dcn31_set_static_screen_control(struct pipe_ctx **pipe_ctx,
                pipe_ctx[i]->stream_res.tg->funcs->set_static_screen_control(pipe_ctx[i]->stream_res.tg,
                                        triggers, params->num_frames);
 }
+
+static void dmub_abm_set_backlight(struct dc_context *dc,
+       struct set_backlight_level_params *backlight_level_params, uint32_t panel_inst)
+{
+       union dmub_rb_cmd cmd;
+
+       memset(&cmd, 0, sizeof(cmd));
+       cmd.abm_set_backlight.header.type = DMUB_CMD__ABM;
+       cmd.abm_set_backlight.header.sub_type = DMUB_CMD__ABM_SET_BACKLIGHT;
+       cmd.abm_set_backlight.abm_set_backlight_data.frame_ramp = backlight_level_params->frame_ramp;
+       cmd.abm_set_backlight.abm_set_backlight_data.backlight_user_level = backlight_level_params->backlight_pwm_u16_16;
+       cmd.abm_set_backlight.abm_set_backlight_data.backlight_control_type = backlight_level_params->control_type;
+       cmd.abm_set_backlight.abm_set_backlight_data.min_luminance = backlight_level_params->min_luminance;
+       cmd.abm_set_backlight.abm_set_backlight_data.max_luminance = backlight_level_params->max_luminance;
+       cmd.abm_set_backlight.abm_set_backlight_data.min_backlight_pwm = backlight_level_params->min_backlight_pwm;
+       cmd.abm_set_backlight.abm_set_backlight_data.max_backlight_pwm = backlight_level_params->max_backlight_pwm;
+       cmd.abm_set_backlight.abm_set_backlight_data.version = DMUB_CMD_ABM_CONTROL_VERSION_1;
+       cmd.abm_set_backlight.abm_set_backlight_data.panel_mask = (0x01 << panel_inst);
+       cmd.abm_set_backlight.header.payload_bytes = sizeof(struct dmub_cmd_abm_set_backlight_data);
+
+       dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT);
+}
+
+bool dcn31_set_backlight_level(struct pipe_ctx *pipe_ctx,
+       struct set_backlight_level_params *backlight_level_params)
+{
+       struct dc_context *dc = pipe_ctx->stream->ctx;
+       struct abm *abm = pipe_ctx->stream_res.abm;
+       struct timing_generator *tg = pipe_ctx->stream_res.tg;
+       struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl;
+       uint32_t otg_inst;
+
+       if (!abm || !tg || !panel_cntl)
+               return false;
+
+       otg_inst = tg->inst;
+
+               dcn21_dmub_abm_set_pipe(abm,
+                       otg_inst,
+                       SET_ABM_PIPE_NORMAL,
+                       panel_cntl->inst,
+                       panel_cntl->pwrseq_inst);
+
+       dmub_abm_set_backlight(dc, backlight_level_params, panel_cntl->inst);
+
+       return true;
+}

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.h b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.h
index b8bc939da1554fcb9d36bd9ae0ae110523761440..0d09aa8cfb65d7f8ecd05f032901305a2f436c8e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.h
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.h
@@ -51,6 +51,8 @@ int dcn31_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_
 void dcn31_reset_hw_ctx_wrap(
                struct dc *dc,
                struct dc_state *context);
+bool dcn31_set_backlight_level(struct pipe_ctx *pipe_ctx,
+               struct set_backlight_level_params *params);
 bool dcn31_is_abm_supported(struct dc *dc,
                struct dc_state *context, struct dc_stream_state *stream);
 void dcn31_init_pipes(struct dc *dc, struct dc_state *context);
@@ -59,5 +61,4 @@ void dcn31_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable);
 void dcn31_set_static_screen_control(struct pipe_ctx **pipe_ctx,
                int num_pipes, const struct dc_static_screen_params *params);
 
-
 #endif /* __DC_HWSS_DCN31_H__ */

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_init.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_init.c
index 56f3c70d4b55486969c6c8f9ad35e0b5eefbb436..5f8f45b4872050bc04dcaa0115b90f7160103de6 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_init.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_init.c
@@ -98,7 +98,7 @@ static const struct hw_sequencer_funcs dcn31_funcs = {
        .set_flip_control_gsl = dcn20_set_flip_control_gsl,
        .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
        .calc_vupdate_position = dcn10_calc_vupdate_position,
-       .set_backlight_level = dcn21_set_backlight_level,
+       .set_backlight_level = dcn31_set_backlight_level,
        .set_abm_immediate_disable = dcn21_set_abm_immediate_disable,
        .set_pipe = dcn21_set_pipe,
        .enable_lvds_link_output = dce110_enable_lvds_link_output,

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_init.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_init.c
index 68e6de6b5758d5d6037f5c8854291f20c5729513..6bdfbf22ce8728d2dd4ce064910d68ce176a2899 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_init.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_init.c
@@ -100,7 +100,7 @@ static const struct hw_sequencer_funcs dcn314_funcs = {
        .set_flip_control_gsl = dcn20_set_flip_control_gsl,
        .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
        .calc_vupdate_position = dcn10_calc_vupdate_position,
-       .set_backlight_level = dcn21_set_backlight_level,
+       .set_backlight_level = dcn31_set_backlight_level,
        .set_abm_immediate_disable = dcn21_set_abm_immediate_disable,
        .set_pipe = dcn21_set_pipe,
        .enable_lvds_link_output = dce110_enable_lvds_link_output,

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_init.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_init.c
index dbcd2dfb19c125821a7ba14debee7ed07a3b9c49..5ecee7e320da964d966eddca812322f1d96f5791 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_init.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_init.c
@@ -98,7 +98,7 @@ static const struct hw_sequencer_funcs dcn32_funcs = {
        .calc_vupdate_position = dcn10_calc_vupdate_position,
        .apply_idle_power_optimizations = dcn32_apply_idle_power_optimizations,
        .does_plane_fit_in_mall = NULL,
-       .set_backlight_level = dcn21_set_backlight_level,
+       .set_backlight_level = dcn31_set_backlight_level,
        .set_abm_immediate_disable = dcn21_set_abm_immediate_disable,
        .hardware_release = dcn30_hardware_release,
        .set_pipe = dcn21_set_pipe,

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
index 3cb4e99074113edf4f3cc8147ae096e9e1bb44ea..e599cdc465bfd2a1936f447696482930d6296846 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
@@ -309,6 +309,7 @@ void dcn35_init_hw(struct dc *dc)
                dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv);
                dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr;
                dc->caps.dmub_caps.mclk_sw = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver;
+               dc->caps.dmub_caps.aux_backlight_support = dc->ctx->dmub_srv->dmub->feature_caps.abm_aux_backlight_support;
        }
 
        if (dc->res_pool->pg_cntl) {

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c
index 55dc5799e725a0c7d147a604d21d424786db8876..fd67779c27a948fe02bddb9477a1f8cc67fa2777 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c
@@ -101,7 +101,7 @@ static const struct hw_sequencer_funcs dcn35_funcs = {
        .set_flip_control_gsl = dcn20_set_flip_control_gsl,
        .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
        .calc_vupdate_position = dcn10_calc_vupdate_position,
-       .set_backlight_level = dcn21_set_backlight_level,
+       .set_backlight_level = dcn31_set_backlight_level,
        .set_abm_immediate_disable = dcn21_set_abm_immediate_disable,
        .set_pipe = dcn21_set_pipe,
        .enable_lvds_link_output = dce110_enable_lvds_link_output,

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
index a93864b63d48fd1244a07d9ec95c4eb97a5cc1c4..3c275a1eff589b115ea55ad79255b2696ffff4d6 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
@@ -100,7 +100,7 @@ static const struct hw_sequencer_funcs dcn351_funcs = {
        .set_flip_control_gsl = dcn20_set_flip_control_gsl,
        .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
        .calc_vupdate_position = dcn10_calc_vupdate_position,
-       .set_backlight_level = dcn21_set_backlight_level,
+       .set_backlight_level = dcn31_set_backlight_level,
        .set_abm_immediate_disable = dcn21_set_abm_immediate_disable,
        .set_pipe = dcn21_set_pipe,
        .enable_lvds_link_output = dce110_enable_lvds_link_output,

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c
index c73305e57d39af9d2438d33341f8985805e61376..23e4f208152efd06437132874279f3957cab97d9 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c
@@ -77,7 +77,7 @@ static const struct hw_sequencer_funcs dcn401_funcs = {
        .calc_vupdate_position = dcn10_calc_vupdate_position,
        .apply_idle_power_optimizations = dcn401_apply_idle_power_optimizations,
        .does_plane_fit_in_mall = NULL,
-       .set_backlight_level = dcn21_set_backlight_level,
+       .set_backlight_level = dcn31_set_backlight_level,
        .set_abm_immediate_disable = dcn21_set_abm_immediate_disable,
        .hardware_release = dcn401_hardware_release,
        .set_pipe = dcn21_set_pipe,

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h
index 1df17c54f3a9f0810be0261c46b5e3563da6c3ac..66fdc5805d0a93dcf09b333b2bef54cc9e5b88dc 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h
@@ -174,11 +174,6 @@ union block_sequence_params {
        struct fams2_global_control_lock_fast_params fams2_global_control_lock_fast_params;
 };
 
-struct set_backlight_level_params {
-       uint32_t backlight_pwm_u16_16;
-       uint32_t frame_ramp;
-};
-
 enum block_sequence_func {
        DMUB_SUBVP_PIPE_CONTROL_LOCK_FAST = 0,
        OPTC_PIPE_CONTROL_LOCK,

diff --git a/drivers/gpu/drm/amd/display/dc/inc/link.h b/drivers/gpu/drm/amd/display/dc/inc/link.h
index 72a8479e1f2d739f20c8cfdb89d24d0869145b89..f04292086c08a081fce8e780c584a0ce66668f12 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/link.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/link.h
@@ -248,8 +248,7 @@ struct link_service {
                        uint32_t *backlight_millinits_avg,
                        uint32_t *backlight_millinits_peak);
        bool (*edp_set_backlight_level)(const struct dc_link *link,
-                       uint32_t backlight_pwm_u16_16,
-                       uint32_t frame_ramp);
+                       struct set_backlight_level_params *backlight_level_params);
        bool (*edp_set_backlight_level_nits)(struct dc_link *link,
                        bool isHDR,
                        uint32_t backlight_millinits,

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
index 43a467f6ce7bd98e8f47e1da53b52d01f6554902..e0e3bb8653595270c8a293b0368b320b67dd6da5 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
@@ -161,7 +161,9 @@ bool edp_set_backlight_level_nits(struct dc_link *link,
                        link->connector_signal != SIGNAL_TYPE_DISPLAY_PORT))
                return false;
 
-       if (link->backlight_control_type == BACKLIGHT_CONTROL_VESA_AUX) {
+       // use internal backlight control if dmub capabilities are not present
+       if (link->backlight_control_type == BACKLIGHT_CONTROL_VESA_AUX &&
+               !link->dc->caps.dmub_caps.aux_backlight_support) {
                uint8_t backlight_enable = 0;
                struct target_luminance_value *target_luminance = NULL;
 
@@ -185,7 +187,7 @@ bool edp_set_backlight_level_nits(struct dc_link *link,
                        (uint8_t *)(target_luminance),
                        sizeof(struct target_luminance_value)) != DC_OK)
                        return false;
-       } else {
+       } else if (link->backlight_control_type == BACKLIGHT_CONTROL_AMD_AUX) {
                struct dpcd_source_backlight_set dpcd_backlight_set;
                *(uint32_t *)&dpcd_backlight_set.backlight_level_millinits = backlight_millinits;
                *(uint16_t *)&dpcd_backlight_set.backlight_transition_time_ms = (uint16_t)transition_time_in_ms;
@@ -517,17 +519,17 @@ static struct pipe_ctx *get_pipe_from_link(const struct dc_link *link)
 }
 
 bool edp_set_backlight_level(const struct dc_link *link,
-               uint32_t backlight_pwm_u16_16,
-               uint32_t frame_ramp)
+               struct set_backlight_level_params *backlight_level_params)
 {
        struct dc  *dc = link->ctx->dc;
+       uint32_t backlight_pwm_u16_16 = backlight_level_params->backlight_pwm_u16_16;
+       uint32_t frame_ramp = backlight_level_params->frame_ramp;
        DC_LOGGER_INIT(link->ctx->logger);
        DC_LOG_BACKLIGHT("New Backlight level: %d (0x%X)\n",
                        backlight_pwm_u16_16, backlight_pwm_u16_16);
 
        if (dc_is_embedded_signal(link->connector_signal)) {
                struct pipe_ctx *pipe_ctx = get_pipe_from_link(link);
-               struct set_backlight_level_params backlight_level_param = { 0 };
 
                if (link->panel_cntl)
                        link->panel_cntl->stored_backlight_registers.USER_LEVEL = backlight_pwm_u16_16;
@@ -542,12 +544,11 @@ bool edp_set_backlight_level(const struct dc_link *link,
                        return false;
                }
 
-               backlight_level_param.backlight_pwm_u16_16 = backlight_pwm_u16_16;
-               backlight_level_param.frame_ramp = frame_ramp;
+               backlight_level_params->frame_ramp = frame_ramp;
 
                dc->hwss.set_backlight_level(
                                pipe_ctx,
-                               &backlight_level_param);
+                               backlight_level_params);
        }
        return true;
 }

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h
index 30dc8c24c008c4b9e15cb7b782e1bf452e2d443c..bcfa6ac5d4e7b6e1a2528ec423246321a6cdbda7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h
@@ -36,8 +36,7 @@ bool edp_get_backlight_level_nits(struct dc_link *link,
                uint32_t *backlight_millinits_avg,
                uint32_t *backlight_millinits_peak);
 bool edp_set_backlight_level(const struct dc_link *link,
-               uint32_t backlight_pwm_u16_16,
-               uint32_t frame_ramp);
+               struct set_backlight_level_params *backlight_level_params);
 bool edp_set_backlight_level_nits(struct dc_link *link,
                bool isHDR,
                uint32_t backlight_millinits,