drm/amdgpu: check return for setting engine dram timings

This resolves the unchecded return value warning reported by Coverity.

Signed-off-by: Tim Huang <tim.huang@amd.com>
Reviewed-by: Jesse Zhang <jesse.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
index 0c8975ac5af9ed294b525c3e3071bd4ed4b2e9c0..093141ad6ed0112e62d232b3eed2f81f9756a7ee 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
@@ -1145,8 +1145,8 @@ int amdgpu_atombios_get_memory_pll_dividers(struct amdgpu_device *adev,
        return 0;
 }
 
-void amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev,
-                                            u32 eng_clock, u32 mem_clock)
+int amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev,
+                                           u32 eng_clock, u32 mem_clock)
 {
        SET_ENGINE_CLOCK_PS_ALLOCATION args;
        int index = GetIndexIntoMasterTable(COMMAND, DynamicMemorySettings);
@@ -1161,8 +1161,8 @@ void amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev,
        if (mem_clock)
                args.sReserved.ulClock = cpu_to_le32(mem_clock & SET_CLOCK_FREQ_MASK);
 
-       amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args,
-               sizeof(args));
+       return amdgpu_atom_execute_table(adev->mode_info.atom_context, index,
+                                        (uint32_t *)&args, sizeof(args));
 }
 
 void amdgpu_atombios_get_default_voltages(struct amdgpu_device *adev,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
index 0811474e8fd3369b6e51015c4189ba0970b83898..0e16432d9a725687ab60da81b32d73519d433cc3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
@@ -163,8 +163,8 @@ int amdgpu_atombios_get_memory_pll_dividers(struct amdgpu_device *adev,
                                            bool strobe_mode,
                                            struct atom_mpll_param *mpll_param);
 
-void amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev,
-                                            u32 eng_clock, u32 mem_clock);
+int amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev,
+                                           u32 eng_clock, u32 mem_clock);
 
 bool
 amdgpu_atombios_is_voltage_gpio(struct amdgpu_device *adev,

diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
index a1baa13ab2c263b54596efd054dea3f299ad5147..43028e776c932dc9a4288a2c659481af1b85dd4b 100644 (file)
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
@@ -4755,13 +4755,15 @@ static int si_populate_memory_timing_parameters(struct amdgpu_device *adev,
        u32 dram_timing;
        u32 dram_timing2;
        u32 burst_time;
+       int ret;
 
        arb_regs->mc_arb_rfsh_rate =
                (u8)si_calculate_memory_refresh_rate(adev, pl->sclk);
 
-       amdgpu_atombios_set_engine_dram_timings(adev,
-                                           pl->sclk,
-                                           pl->mclk);
+       ret = amdgpu_atombios_set_engine_dram_timings(adev, pl->sclk,
+                                                     pl->mclk);
+       if (ret)
+               return ret;
 
        dram_timing  = RREG32(MC_ARB_DRAM_TIMING);
        dram_timing2 = RREG32(MC_ARB_DRAM_TIMING2);