--- /dev/null
+From 730e76b05bbba648a6c11918b5e6ddcf46d76d16 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 20 Jun 2023 13:28:24 -0700
+Subject: regmap: spi-avmm: Fix regmap_bus max_raw_write
+
+From: Russ Weight <russell.h.weight@intel.com>
+
+[ Upstream commit c8e796895e2310b6130e7577248da1d771431a77 ]
+
+The max_raw_write member of the regmap_spi_avmm_bus structure is defined
+as:
+ .max_raw_write = SPI_AVMM_VAL_SIZE * MAX_WRITE_CNT
+
+SPI_AVMM_VAL_SIZE == 4 and MAX_WRITE_CNT == 1 so this results in a
+maximum write transfer size of 4 bytes which provides only enough space to
+transfer the address of the target register. It provides no space for the
+value to be transferred. This bug became an issue (divide-by-zero in
+_regmap_raw_write()) after the following was accepted into mainline:
+
+commit 3981514180c9 ("regmap: Account for register length when chunking")
+
+Change max_raw_write to include space (4 additional bytes) for both the
+register address and value:
+
+ .max_raw_write = SPI_AVMM_REG_SIZE + SPI_AVMM_VAL_SIZE * MAX_WRITE_CNT
+
+Fixes: 7f9fb67358a2 ("regmap: add Intel SPI Slave to AVMM Bus Bridge support")
+Reviewed-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
+Signed-off-by: Russ Weight <russell.h.weight@intel.com>
+Link: https://lore.kernel.org/r/20230620202824.380313-1-russell.h.weight@intel.com
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/base/regmap/regmap-spi-avmm.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/base/regmap/regmap-spi-avmm.c b/drivers/base/regmap/regmap-spi-avmm.c
+index 4c2b94b3e30be..6af692844c196 100644
+--- a/drivers/base/regmap/regmap-spi-avmm.c
++++ b/drivers/base/regmap/regmap-spi-avmm.c
+@@ -660,7 +660,7 @@ static const struct regmap_bus regmap_spi_avmm_bus = {
+ .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
+ .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
+ .max_raw_read = SPI_AVMM_VAL_SIZE * MAX_READ_CNT,
+- .max_raw_write = SPI_AVMM_VAL_SIZE * MAX_WRITE_CNT,
++ .max_raw_write = SPI_AVMM_REG_SIZE + SPI_AVMM_VAL_SIZE * MAX_WRITE_CNT,
+ .free_context = spi_avmm_bridge_ctx_free,
+ };
+
+--
+2.39.2
+
--- /dev/null
+From fe3fd6fb72db8b40355cbad75136402c9ac50cf4 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 14 Jun 2023 14:52:40 +0200
+Subject: regulator: pca9450: Fix LDO3OUT and LDO4OUT MASK
+
+From: Teresa Remmet <t.remmet@phytec.de>
+
+[ Upstream commit 7257d930aadcd62d1c7971ab14f3b1126356abdc ]
+
+L3_OUT and L4_OUT Bit fields range from Bit 0:4 and thus the
+mask should be 0x1F instead of 0x0F.
+
+Fixes: 0935ff5f1f0a ("regulator: pca9450: add pca9450 pmic driver")
+Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
+Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
+Link: https://lore.kernel.org/r/20230614125240.3946519-1-t.remmet@phytec.de
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ include/linux/regulator/pca9450.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/include/linux/regulator/pca9450.h b/include/linux/regulator/pca9450.h
+index 3c01c2bf84f53..505c908dbb817 100644
+--- a/include/linux/regulator/pca9450.h
++++ b/include/linux/regulator/pca9450.h
+@@ -196,11 +196,11 @@ enum {
+
+ /* PCA9450_REG_LDO3_VOLT bits */
+ #define LDO3_EN_MASK 0xC0
+-#define LDO3OUT_MASK 0x0F
++#define LDO3OUT_MASK 0x1F
+
+ /* PCA9450_REG_LDO4_VOLT bits */
+ #define LDO4_EN_MASK 0xC0
+-#define LDO4OUT_MASK 0x0F
++#define LDO4OUT_MASK 0x1F
+
+ /* PCA9450_REG_LDO5_VOLT bits */
+ #define LDO5L_EN_MASK 0xC0
+--
+2.39.2
+
mmc-sunxi-fix-deferred-probing.patch
bpf-ensure-main-program-has-an-extable.patch
wifi-iwlwifi-pcie-handle-so-f-device-for-pci-id-0x7af0.patch
+spi-spi-geni-qcom-correctly-handle-eprobe_defer-from.patch
+regulator-pca9450-fix-ldo3out-and-ldo4out-mask.patch
+regmap-spi-avmm-fix-regmap_bus-max_raw_write.patch
--- /dev/null
+From b6cdf19586eb7a89672173e27b287c2de9608fea Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Thu, 15 Jun 2023 14:51:45 +0200
+Subject: spi: spi-geni-qcom: correctly handle -EPROBE_DEFER from
+ dma_request_chan()
+
+From: Neil Armstrong <neil.armstrong@linaro.org>
+
+[ Upstream commit 9d7054fb3ac2e8d252aae1268f20623f244e644f ]
+
+Now spi_geni_grab_gpi_chan() errors are correctly reported, the
+-EPROBE_DEFER error should be returned from probe in case the
+GPI dma driver is built as module and/or not probed yet.
+
+Fixes: b59c122484ec ("spi: spi-geni-qcom: Add support for GPI dma")
+Fixes: 6532582c353f ("spi: spi-geni-qcom: fix error handling in spi_geni_grab_gpi_chan()")
+Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
+Link: https://lore.kernel.org/r/20230615-topic-sm8550-upstream-fix-spi-geni-qcom-probe-v2-1-670c3d9e8c9c@linaro.org
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/spi/spi-geni-qcom.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
+index 4e83cc5b445d8..dd1581893fe72 100644
+--- a/drivers/spi/spi-geni-qcom.c
++++ b/drivers/spi/spi-geni-qcom.c
+@@ -595,6 +595,8 @@ static int spi_geni_init(struct spi_geni_master *mas)
+ geni_se_select_mode(se, GENI_GPI_DMA);
+ dev_dbg(mas->dev, "Using GPI DMA mode for SPI\n");
+ break;
++ } else if (ret == -EPROBE_DEFER) {
++ goto out_pm;
+ }
+ /*
+ * in case of failure to get dma channel, we can still do the
+--
+2.39.2
+
projects / thirdparty / kernel / stable-queue.git / commitdiff
