+2023-11-03 Martin Uecker <uecker@tugraz.at>
+
+ PR c/98541
+ * gimple-ssa-warn-access.cc
+ (pass_waccess::maybe_check_access_sizes): For VLA bounds
+ in parameters, only warn about null pointers with 'static'.
+
+2023-11-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * tree-vect-stmts.cc (vectorizable_simd_clone_call): Allow unmasked
+ calls to use masked simdclones.
+
+2023-11-03 David Malcolm <dmalcolm@redhat.com>
+
+ * diagnostic.cc (diagnostic_initialize): Update for consolidation
+ of group-based fields.
+ (diagnostic_report_diagnostic): Likewise.
+ (diagnostic_context::begin_group): New, based on body of
+ auto_diagnostic_group's ctor.
+ (diagnostic_context::end_group): New, based on body of
+ auto_diagnostic_group's dtor.
+ (auto_diagnostic_group::auto_diagnostic_group): Convert to a call
+ to begin_group.
+ (auto_diagnostic_group::~auto_diagnostic_group): Convert to a call
+ to end_group.
+ * diagnostic.h (diagnostic_context::begin_group): New decl.
+ (diagnostic_context::end_group): New decl.
+ (diagnostic_context::diagnostic_group_nesting_depth): Rename to...
+ (diagnostic_context::m_diagnostic_groups.m_nesting_depth):
+ ...this.
+ (diagnostic_context::diagnostic_group_emission_count): Rename
+ to...
+ (diagnostic_context::m_diagnostic_groups::m_emission_count):
+ ...this.
+
+2023-11-03 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/111766
+ * range-op.cc (operator_equal::fold_range): Check constants
+ against the bitmask.
+ (operator_not_equal::fold_range): Ditto.
+ * value-range.h (irange_bitmask::member_p): New.
+
+2023-11-03 Andrew MacLeod <amacleod@redhat.com>
+
+ * value-range.cc (irange_bitmask::adjust_range): New.
+ (irange::intersect_bitmask): Call adjust_range.
+ * value-range.h (irange_bitmask::adjust_range): New prototype.
+
+2023-11-03 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
+ Rename to ...
+ (ix86_memory_address_reg_class): ... this. Generalize address
+ register class handling to allow multiple address register classes.
+ Return maximal class for unrecognized instructions. Improve comments.
+ (ix86_insn_base_reg_class): Rewrite to handle
+ multiple address register classes.
+ (ix86_regno_ok_for_insn_base_p): Ditto.
+ (ix86_insn_index_reg_class): Ditto.
+ * config/i386/i386.md: Rename "gpr32" attribute to "addr"
+ and substitute its values with "0" -> "gpr16", "1" -> "*".
+ (addr): New attribute to limit allowed address register set.
+ (gpr32): Remove.
+ * config/i386/mmx.md: Rename "gpr32" attribute to "addr"
+ and substitute its values with "0" -> "gpr16", "1" -> "*".
+ * config/i386/sse.md: Ditto.
+
+2023-11-03 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-loop.cc (vectorizable_live_operation): Simplify
+ LC PHI replacement.
+
+2023-11-03 Roger Sayle <roger@nextmovesoftware.com>
+
+ * config/arc/arc.md (addsi3): Fix GNU-style code formatting.
+ (adddi3): Change define_expand to generate a *adddi3.
+ (*adddi3): New define_insn_and_split to lower DImode additions
+ during the split1 pass (after combine and before reload).
+ (ashldi3): New define_expand to (only) generate *ashldi3_cnt1
+ for DImode left shifts by a single bit.
+ (*ashldi3_cnt1): New define_insn_and_split to lower DImode
+ left shifts by one bit to an *adddi3.
+
+2023-11-03 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64.md (*cmov_uxtw_insn_insv): Remove
+ can_create_pseudo_p condition.
+
+2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ * tree-vect-slp.cc (vect_get_and_check_slp_defs): Support SLP for dummy mask -1.
+ * tree-vect-stmts.cc (vectorizable_load): Ditto.
+
+2023-11-03 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/112366
+ * tree-vect-loop.cc (vectorizable_live_operation): Remove
+ assert.
+
+2023-11-03 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/112310
+ * tree-ssa-pre.cc (do_hoist_insertion): Keep the union
+ of expressions, validate dependences are contained within
+ the hoistable set before hoisting.
+
+2023-11-03 Pan Li <pan2.li@intel.com>
+
+ * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
+ (lround<mode><v_i_l_ll_convert>2): Ditto.
+ (lceil<mode><v_i_l_ll_convert>2): Ditto.
+ (lfloor<mode><v_i_l_ll_convert>2): Ditto.
+ (lrint<mode><v_f2si_convert>2): New pattern for cvt from
+ FP to SI.
+ (lround<mode><v_f2si_convert>2): Ditto.
+ (lceil<mode><v_f2si_convert>2): Ditto.
+ (lfloor<mode><v_f2si_convert>2): Ditto.
+ (lrint<mode><v_f2di_convert>2): New pattern for cvt from
+ FP to DI.
+ (lround<mode><v_f2di_convert>2): Ditto.
+ (lceil<mode><v_f2di_convert>2): Ditto.
+ (lfloor<mode><v_f2di_convert>2): Ditto.
+ * config/riscv/vector-iterators.md: Renew iterators for both
+ the SI and DI.
+
+2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ PR target/112326
+ * config/riscv/riscv-avlprop.cc (get_insn_vtype_mode): New function.
+ (simplify_replace_vlmax_avl): Ditto.
+ (pass_avlprop::execute): Add immediate AVL simplification.
+ * config/riscv/riscv-protos.h (imm_avl_p): Rename.
+ * config/riscv/riscv-v.cc (const_vlmax_p): Ditto.
+ (imm_avl_p): Ditto.
+ (emit_vlmax_insn): Adapt for new interface name.
+ * config/riscv/vector.md (mode_idx): New attribute.
+
+2023-11-03 Pan Li <pan2.li@intel.com>
+
+ Revert:
+ 2023-11-02 Pan Li <pan2.li@intel.com>
+
+ * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
+ (lround<mode><v_i_l_ll_convert>2): Ditto.
+ (lceil<mode><v_i_l_ll_convert>2): Ditto.
+ (lfloor<mode><v_i_l_ll_convert>2): Ditto.
+ (lrint<mode><v_f2si_convert>2): New pattern for cvt from
+ FP to SI.
+ (lround<mode><v_f2si_convert>2): Ditto.
+ (lceil<mode><v_f2si_convert>2): Ditto.
+ (lfloor<mode><v_f2si_convert>2): Ditto.
+ (lrint<mode><v_f2di_convert>2): New pattern for cvt from
+ FP to DI.
+ (lround<mode><v_f2di_convert>2): Ditto.
+ (lceil<mode><v_f2di_convert>2): Ditto.
+ (lfloor<mode><v_f2di_convert>2): Ditto.
+ * config/riscv/vector-iterators.md: Renew iterators for both
+ the SI and DI.
+
2023-11-02 Edwin Lu <ewlu@rivosinc.com>
* config/riscv/riscv.cc (riscv_sched_variable_issue): add disabled assert
+2023-11-03 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/97245
+ * match.cc (gfc_match_call): If a procedure pointer has already been
+ resolved, do not create a new symbol in a procedure reference of
+ the same name shadowing the first one if it is host-associated.
+
+2023-11-03 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/92887
+ * trans-expr.cc (conv_cond_temp): Helper function for creation of a
+ conditional temporary.
+ (gfc_conv_procedure_call): Handle passing of allocatable or pointer
+ actual argument to dummy with OPTIONAL + VALUE attribute. Actual
+ arguments that are not allocated or associated are treated as not
+ present.
+
+2023-11-03 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/98498
+ * interface.cc (upoly_ok): Defined operators using unlimited
+ polymorphic formal arguments must not override the intrinsic
+ operator use.
+
2023-11-02 Paul Thomas <pault@gcc.gnu.org>
PR fortran/112316
+2023-11-03 Martin Uecker <uecker@tugraz.at>
+
+ PR c/98541
+ * gcc.dg/Wnonnull-4.c: Adapt test.
+ * gcc.dg/Wstringop-overflow-40.c: Adapt test.
+
+2023-11-03 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/97245
+ * gfortran.dg/proc_ptr_53.f90: New test.
+
+2023-11-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * gcc.dg/vect/vect-simd-clone-20.c: New file.
+ * gfortran.dg/simd-builtins-1.h: Adapt.
+ * gfortran.dg/simd-builtins-6.f90: Adapt.
+
+2023-11-03 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/92887
+ * gfortran.dg/value_optional_1.f90: New test.
+
+2023-11-03 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/111766
+ * gcc.dg/pr111766.c: New.
+
+2023-11-03 Richard Biener <rguenther@suse.de>
+
+ * gfortran.dg/20231103-1.f90: New testcase.
+ * gfortran.dg/20231103-2.f90: Likewise.
+
+2023-11-03 Roger Sayle <roger@nextmovesoftware.com>
+
+ * gcc.target/arc/adddi3-1.c: New test case.
+ * gcc.target/arc/ashldi3-1.c: Likewise.
+
+2023-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * g++.dg/tree-prof/indir-call-prof-2.C: Specify
+ 'dg-require-effective-target exceptions_enabled'.
+ * g++.dg/tree-prof/partition1.C: Likewise.
+ * g++.dg/tree-prof/partition2.C: Likewise.
+ * g++.dg/tree-prof/partition3.C: Likewise.
+ * g++.dg/tree-prof/pr51719.C: Likewise.
+ * g++.dg/tree-prof/pr57451.C: Likewise.
+ * g++.dg/tree-prof/pr59255.C: Likewise.
+
+2023-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * g++.dg/lto/20081109-1_0.C: Specify
+ 'dg-require-effective-target exceptions_enabled'.
+ * g++.dg/lto/20081109_0.C: Likewise.
+ * g++.dg/lto/20091026-1_0.C: Likewise.
+ * g++.dg/lto/pr87906_0.C: Likewise.
+ * g++.dg/lto/pr88046_0.C: Likewise.
+
+2023-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * g++.dg/compat/eh/ctor1_main.C: Specify
+ 'dg-require-effective-target exceptions_enabled'.
+ * g++.dg/compat/eh/ctor2_main.C: Likewise.
+ * g++.dg/compat/eh/dtor1_main.C: Likewise.
+ * g++.dg/compat/eh/filter1_main.C: Likewise.
+ * g++.dg/compat/eh/filter2_main.C: Likewise.
+ * g++.dg/compat/eh/new1_main.C: Likewise.
+ * g++.dg/compat/eh/nrv1_main.C: Likewise.
+ * g++.dg/compat/eh/spec3_main.C: Likewise.
+ * g++.dg/compat/eh/template1_main.C: Likewise.
+ * g++.dg/compat/eh/unexpected1_main.C: Likewise.
+ * g++.dg/compat/init/array5_main.C: Likewise.
+
+2023-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * g++.dg/cpp0x/catch1.C: Specify
+ 'dg-require-effective-target exceptions_enabled'.
+ * g++.dg/cpp0x/constexpr-throw.C: Likewise.
+ * g++.dg/cpp1y/constexpr-89785-2.C: Likewise.
+ * g++.dg/cpp1y/constexpr-throw.C: Likewise.
+ * g++.dg/cpp1y/pr79393-3.C: Likewise.
+ * g++.dg/cpp2a/consteval-memfn1.C: Likewise.
+ * g++.dg/cpp2a/consteval11.C: Likewise.
+ * g++.dg/cpp2a/consteval34.C: Likewise.
+ * g++.dg/cpp2a/consteval9.C: Likewise.
+ * g++.dg/cpp2a/explicit1.C: Likewise.
+ * g++.dg/cpp2a/explicit2.C: Likewise.
+ * g++.dg/cpp2a/explicit5.C: Likewise.
+ * g++.dg/eh/builtin10.C: Likewise.
+ * g++.dg/eh/builtin11.C: Likewise.
+ * g++.dg/eh/builtin6.C: Likewise.
+ * g++.dg/eh/builtin7.C: Likewise.
+ * g++.dg/eh/builtin9.C: Likewise.
+ * g++.dg/eh/dtor4.C: Likewise.
+ * g++.dg/eh/pr42859.C: Likewise.
+ * g++.dg/ext/stmtexpr25.C: Likewise.
+ * g++.dg/ext/vla4.C: Likewise.
+ * g++.dg/init/placement4.C: Likewise.
+ * g++.dg/other/error32.C: Likewise.
+ * g++.dg/parse/crash55.C: Likewise.
+ * g++.dg/parse/pr31952-2.C: Likewise.
+ * g++.dg/parse/pr31952-3.C: Likewise.
+ * g++.dg/tm/noexcept-7.C: Likewise.
+ * g++.dg/torture/pr43257.C: Likewise.
+ * g++.dg/torture/pr56694.C: Likewise.
+ * g++.dg/torture/pr81659.C: Likewise.
+ * g++.dg/warn/Wcatch-value-1.C: Likewise.
+ * g++.dg/warn/Wcatch-value-2.C: Likewise.
+ * g++.dg/warn/Wcatch-value-3.C: Likewise.
+ * g++.dg/warn/Wcatch-value-3b.C: Likewise.
+ * g++.dg/warn/Wexceptions1.C: Likewise.
+ * g++.dg/warn/Wexceptions3.C: Likewise.
+ * g++.dg/warn/Winfinite-recursion-3.C: Likewise.
+ * g++.dg/warn/Wreturn-6.C: Likewise.
+ * g++.dg/warn/Wstringop-truncation-2.C: Likewise.
+ * g++.dg/warn/Wterminate1.C: Likewise.
+ * g++.old-deja/g++.eh/catch1.C: Likewise.
+ * g++.old-deja/g++.eh/catch10.C: Likewise.
+ * g++.old-deja/g++.eh/cond1.C: Likewise.
+ * g++.old-deja/g++.eh/ctor1.C: Likewise.
+ * g++.old-deja/g++.eh/throw2.C: Likewise.
+ * g++.old-deja/g++.other/cond5.C: Likewise.
+
+2023-11-03 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/112310
+ * gcc.dg/torture/pr112310.c: New testcase.
+
+2023-11-03 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/98498
+ * gfortran.dg/interface_50.f90: New test.
+
+2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ PR target/112326
+ * gcc.target/riscv/rvv/autovec/pr112326.c: New test.
+
2023-11-02 Paul Thomas <pault@gcc.gnu.org>
PR fortran/112316
+2023-11-03 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
+
+ * Makefile.am: Update "Running <sub-testsuite> ..." output
+ * Makefile.in: Regenerate.
+
2022-08-30 Martin Liska <mliska@suse.cz>
* Makefile.in: Regenerate.
+2023-11-03 Thomas Schwinge <thomas@codesourcery.com>
+
+ * config/gcn/gthr-gcn.h (__gthread_getspecific): 's%NULL%0'.
+
2023-10-31 Alexandre Oliva <oliva@adacore.com>
* hardcfr.c: Adjust copyright year.
projects / thirdparty / gcc.git / commitdiff
