]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: add inst to amdgpu_dpm_enable_vcn
authorBoyuan Zhang <boyuan.zhang@amd.com>
Thu, 3 Oct 2024 18:47:29 +0000 (14:47 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 10 Dec 2024 15:26:47 +0000 (10:26 -0500)
Add an instance parameter to amdgpu_dpm_enable_vcn() function, and change
all calls from vcn ip functions to add instance argument. vcn generations
with only one instance (v1.0, v2.0) always use 0 as instance number. vcn
generations with multiple instances (v2.5, v3.0, v4.0, v4.0.3, v4.0.5,
v5.0.0) use the actual instance number.

v2: remove for-loop in amdgpu_dpm_enable_vcn(), and temporarily move it
to vcn ip with multiple instances, in order to keep the exact same logic
as before, until further separation in next patch.

v3: fix missing prefix

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
drivers/gpu/drm/amd/pm/amdgpu_dpm.c
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h

index 511d76e188f2688ab2fdc534c085683822cfadd0..7ad2ab3affe430795cf8a82ba86e61caebbe9bfa 100644 (file)
@@ -303,7 +303,7 @@ static int vcn_v1_0_suspend(struct amdgpu_ip_block *ip_block)
        idle_work_unexecuted = cancel_delayed_work_sync(&adev->vcn.idle_work);
        if (idle_work_unexecuted) {
                if (adev->pm.dpm_enabled)
-                       amdgpu_dpm_enable_vcn(adev, false);
+                       amdgpu_dpm_enable_vcn(adev, false, 0);
        }
 
        r = vcn_v1_0_hw_fini(ip_block);
@@ -1856,7 +1856,7 @@ static void vcn_v1_0_idle_work_handler(struct work_struct *work)
        if (fences == 0) {
                amdgpu_gfx_off_ctrl(adev, true);
                if (adev->pm.dpm_enabled)
-                       amdgpu_dpm_enable_vcn(adev, false);
+                       amdgpu_dpm_enable_vcn(adev, false, 0);
                else
                        amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCN,
                               AMD_PG_STATE_GATE);
@@ -1886,7 +1886,7 @@ void vcn_v1_0_set_pg_for_begin_use(struct amdgpu_ring *ring, bool set_clocks)
        if (set_clocks) {
                amdgpu_gfx_off_ctrl(adev, false);
                if (adev->pm.dpm_enabled)
-                       amdgpu_dpm_enable_vcn(adev, true);
+                       amdgpu_dpm_enable_vcn(adev, true, 0);
                else
                        amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCN,
                               AMD_PG_STATE_UNGATE);
index 697822abf3fc769e2477ff16e3d7a2261ca87d39..f34cab96d0b473ff4188e9013adc90fd4010f091 100644 (file)
@@ -978,7 +978,7 @@ static int vcn_v2_0_start(struct amdgpu_device *adev)
        int i, j, r;
 
        if (adev->pm.dpm_enabled)
-               amdgpu_dpm_enable_vcn(adev, true);
+               amdgpu_dpm_enable_vcn(adev, true, 0);
 
        if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)
                return vcn_v2_0_start_dpg_mode(adev, adev->vcn.indirect_sram);
@@ -1235,7 +1235,7 @@ static int vcn_v2_0_stop(struct amdgpu_device *adev)
 
 power_off:
        if (adev->pm.dpm_enabled)
-               amdgpu_dpm_enable_vcn(adev, false);
+               amdgpu_dpm_enable_vcn(adev, false, 0);
 
        return 0;
 }
index 0afbcf72cd513ab27f2a533a1c5cf3e0dfe6852f..beab2c24042d81e53e290dcbd03429a384176bd3 100644 (file)
@@ -1012,8 +1012,10 @@ static int vcn_v2_5_start(struct amdgpu_device *adev)
        uint32_t rb_bufsz, tmp;
        int i, j, k, r;
 
-       if (adev->pm.dpm_enabled)
-               amdgpu_dpm_enable_vcn(adev, true);
+       for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+               if (adev->pm.dpm_enabled)
+                       amdgpu_dpm_enable_vcn(adev, true, i);
+       }
 
        for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
                if (adev->vcn.harvest_config & (1 << i))
@@ -1485,8 +1487,10 @@ static int vcn_v2_5_stop(struct amdgpu_device *adev)
                        ~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);
        }
 
-       if (adev->pm.dpm_enabled)
-               amdgpu_dpm_enable_vcn(adev, false);
+       for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+               if (adev->pm.dpm_enabled)
+                       amdgpu_dpm_enable_vcn(adev, false, i);
+       }
 
        return 0;
 }
index b28aad37d9ed97516b30906a332cf8a94a334f50..6d047257490c68b7978ee4cdd44543e423324a3e 100644 (file)
@@ -1141,8 +1141,10 @@ static int vcn_v3_0_start(struct amdgpu_device *adev)
        uint32_t rb_bufsz, tmp;
        int i, j, k, r;
 
-       if (adev->pm.dpm_enabled)
-               amdgpu_dpm_enable_vcn(adev, true);
+       for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+               if (adev->pm.dpm_enabled)
+                       amdgpu_dpm_enable_vcn(adev, true, i);
+       }
 
        for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
                if (adev->vcn.harvest_config & (1 << i))
@@ -1632,8 +1634,10 @@ static int vcn_v3_0_stop(struct amdgpu_device *adev)
                vcn_v3_0_enable_static_power_gating(adev, i);
        }
 
-       if (adev->pm.dpm_enabled)
-               amdgpu_dpm_enable_vcn(adev, false);
+       for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+               if (adev->pm.dpm_enabled)
+                       amdgpu_dpm_enable_vcn(adev, false, i);
+       }
 
        return 0;
 }
index 5c6060374ac4ca254470e07c60954a693713eb1e..fa1d81b94172f7f5988b4955e7ba8cad21966f3d 100644 (file)
@@ -1097,8 +1097,10 @@ static int vcn_v4_0_start(struct amdgpu_device *adev)
        uint32_t tmp;
        int i, j, k, r;
 
-       if (adev->pm.dpm_enabled)
-               amdgpu_dpm_enable_vcn(adev, true);
+       for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+               if (adev->pm.dpm_enabled)
+                       amdgpu_dpm_enable_vcn(adev, true, i);
+       }
 
        for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
                if (adev->vcn.harvest_config & (1 << i))
@@ -1623,8 +1625,10 @@ static int vcn_v4_0_stop(struct amdgpu_device *adev)
                vcn_v4_0_enable_static_power_gating(adev, i);
        }
 
-       if (adev->pm.dpm_enabled)
-               amdgpu_dpm_enable_vcn(adev, false);
+       for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+               if (adev->pm.dpm_enabled)
+                       amdgpu_dpm_enable_vcn(adev, false, i);
+       }
 
        return 0;
 }
index 037c85f80c64ef83c98597bb27ab8db881755332..9da9a99d465a796722319e6048349fd60c9fb164 100644 (file)
@@ -1121,8 +1121,10 @@ static int vcn_v4_0_3_start(struct amdgpu_device *adev)
        int i, j, k, r, vcn_inst;
        uint32_t tmp;
 
-       if (adev->pm.dpm_enabled)
-               amdgpu_dpm_enable_vcn(adev, true);
+       for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+               if (adev->pm.dpm_enabled)
+                       amdgpu_dpm_enable_vcn(adev, true, i);
+       }
 
        for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
                if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) {
@@ -1395,8 +1397,10 @@ static int vcn_v4_0_3_stop(struct amdgpu_device *adev)
                vcn_v4_0_3_enable_clock_gating(adev, i);
        }
 Done:
-       if (adev->pm.dpm_enabled)
-               amdgpu_dpm_enable_vcn(adev, false);
+       for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+               if (adev->pm.dpm_enabled)
+                       amdgpu_dpm_enable_vcn(adev, false, i);
+       }
 
        return 0;
 }
index 398191a484462f922ab397cb24a7969be2038f7d..f0ec8bc031c64f82a9c6d142ccfc78d84b3a2c40 100644 (file)
@@ -1000,8 +1000,10 @@ static int vcn_v4_0_5_start(struct amdgpu_device *adev)
        uint32_t tmp;
        int i, j, k, r;
 
-       if (adev->pm.dpm_enabled)
-               amdgpu_dpm_enable_vcn(adev, true);
+       for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+               if (adev->pm.dpm_enabled)
+                       amdgpu_dpm_enable_vcn(adev, true, i);
+       }
 
        for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
                if (adev->vcn.harvest_config & (1 << i))
@@ -1277,8 +1279,10 @@ static int vcn_v4_0_5_stop(struct amdgpu_device *adev)
                vcn_v4_0_5_enable_static_power_gating(adev, i);
        }
 
-       if (adev->pm.dpm_enabled)
-               amdgpu_dpm_enable_vcn(adev, false);
+       for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+               if (adev->pm.dpm_enabled)
+                       amdgpu_dpm_enable_vcn(adev, false, i);
+       }
 
        return 0;
 }
index fa274d2f5fd2a332576fde2a48bdb1676a8f9e82..bc8324966469fc09f327b8523d36afb238758357 100644 (file)
@@ -771,8 +771,10 @@ static int vcn_v5_0_0_start(struct amdgpu_device *adev)
        uint32_t tmp;
        int i, j, k, r;
 
-       if (adev->pm.dpm_enabled)
-               amdgpu_dpm_enable_vcn(adev, true);
+       for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+               if (adev->pm.dpm_enabled)
+                       amdgpu_dpm_enable_vcn(adev, true, i);
+       }
 
        for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
                if (adev->vcn.harvest_config & (1 << i))
@@ -1018,8 +1020,10 @@ static int vcn_v5_0_0_stop(struct amdgpu_device *adev)
                vcn_v5_0_0_enable_static_power_gating(adev, i);
        }
 
-       if (adev->pm.dpm_enabled)
-               amdgpu_dpm_enable_vcn(adev, false);
+       for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+               if (adev->pm.dpm_enabled)
+                       amdgpu_dpm_enable_vcn(adev, false, i);
+       }
 
        return 0;
 }
index 0724f8dda47041a4058746ee7f7a60f35ff6706a..4d90e3f0bd1776dac59c58aa1c5910370e3aec51 100644 (file)
@@ -581,16 +581,14 @@ void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable)
                          enable ? "enable" : "disable", ret);
 }
 
-void amdgpu_dpm_enable_vcn(struct amdgpu_device *adev, bool enable)
+void amdgpu_dpm_enable_vcn(struct amdgpu_device *adev, bool enable, int inst)
 {
-       int i, ret = 0;
+       int ret = 0;
 
-       for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
-               ret = amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_VCN, !enable, i);
-               if (ret)
-                       DRM_ERROR("Dpm %s uvd failed, ret = %d. \n",
-                                 enable ? "enable" : "disable", ret);
-       }
+       ret = amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_VCN, !enable, inst);
+       if (ret)
+               DRM_ERROR("Dpm %s uvd failed, ret = %d. \n",
+                         enable ? "enable" : "disable", ret);
 }
 
 void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable)
index e87d67484f0e23f9634998b5bf86ea912a3c61fd..1f5ac7e0230d292c31bb3372c46efae9eb60a024 100644 (file)
@@ -446,7 +446,7 @@ void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev);
 
 void amdgpu_dpm_compute_clocks(struct amdgpu_device *adev);
 void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable);
-void amdgpu_dpm_enable_vcn(struct amdgpu_device *adev, bool enable);
+void amdgpu_dpm_enable_vcn(struct amdgpu_device *adev, bool enable, int inst);
 void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable);
 void amdgpu_dpm_enable_jpeg(struct amdgpu_device *adev, bool enable);
 void amdgpu_dpm_enable_vpe(struct amdgpu_device *adev, bool enable);