--- /dev/null
+From 92f0eb08c66a73594cf200e65689e767f7f0da5e Mon Sep 17 00:00:00 2001
+From: Anson Huang <Anson.Huang@nxp.com>
+Date: Fri, 14 Sep 2018 10:59:21 +0800
+Subject: ARM: dts: imx6ul: use nvmem-cells for cpu speed grading
+
+From: Anson Huang <Anson.Huang@nxp.com>
+
+commit 92f0eb08c66a73594cf200e65689e767f7f0da5e upstream.
+
+On i.MX6UL, accessing OCOTP directly is wrong because the ocotp clock
+needs to be enabled first, so use the nvmem-cells binding instead.
+
+Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+Cc: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
+Cc: Lucas Stach <l.stach@pengutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/boot/dts/imx6ul.dtsi | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/arch/arm/boot/dts/imx6ul.dtsi
++++ b/arch/arm/boot/dts/imx6ul.dtsi
+@@ -87,6 +87,8 @@
+ "pll1_sys";
+ arm-supply = <®_arm>;
+ soc-supply = <®_soc>;
++ nvmem-cells = <&cpu_speed_grade>;
++ nvmem-cell-names = "speed_grade";
+ };
+ };
+
+@@ -930,6 +932,10 @@
+ tempmon_temp_grade: temp-grade@20 {
+ reg = <0x20 4>;
+ };
++
++ cpu_speed_grade: speed-grade@10 {
++ reg = <0x10 4>;
++ };
+ };
+
+ lcdif: lcdif@21c8000 {
--- /dev/null
+From 2733fb0d0699246711cf622e0e2faf02a05b69dc Mon Sep 17 00:00:00 2001
+From: Anson Huang <Anson.Huang@nxp.com>
+Date: Mon, 8 Oct 2018 14:07:34 +0800
+Subject: cpufreq: imx6q: read OCOTP through nvmem for imx6ul/imx6ull
+
+From: Anson Huang <Anson.Huang@nxp.com>
+
+commit 2733fb0d0699246711cf622e0e2faf02a05b69dc upstream.
+
+On i.MX6UL/i.MX6ULL, accessing OCOTP directly is wrong because
+the ocotp clock needs to be enabled first. Add support for reading
+OCOTP through the nvmem API, and keep the old method there to
+support old dtb.
+
+Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
+Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Cc: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
+Cc: Lucas Stach <l.stach@pengutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/cpufreq/imx6q-cpufreq.c | 52 ++++++++++++++++++++++++++--------------
+ 1 file changed, 35 insertions(+), 17 deletions(-)
+
+--- a/drivers/cpufreq/imx6q-cpufreq.c
++++ b/drivers/cpufreq/imx6q-cpufreq.c
+@@ -12,6 +12,7 @@
+ #include <linux/cpu_cooling.h>
+ #include <linux/err.h>
+ #include <linux/module.h>
++#include <linux/nvmem-consumer.h>
+ #include <linux/of.h>
+ #include <linux/of_address.h>
+ #include <linux/pm_opp.h>
+@@ -295,20 +296,32 @@ put_node:
+ #define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2
+ #define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3
+
+-static void imx6ul_opp_check_speed_grading(struct device *dev)
++static int imx6ul_opp_check_speed_grading(struct device *dev)
+ {
+- struct device_node *np;
+- void __iomem *base;
+ u32 val;
++ int ret = 0;
+
+- np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-ocotp");
+- if (!np)
+- return;
++ if (of_find_property(dev->of_node, "nvmem-cells", NULL)) {
++ ret = nvmem_cell_read_u32(dev, "speed_grade", &val);
++ if (ret)
++ return ret;
++ } else {
++ struct device_node *np;
++ void __iomem *base;
+
+- base = of_iomap(np, 0);
+- if (!base) {
+- dev_err(dev, "failed to map ocotp\n");
+- goto put_node;
++ np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-ocotp");
++ if (!np)
++ return -ENOENT;
++
++ base = of_iomap(np, 0);
++ of_node_put(np);
++ if (!base) {
++ dev_err(dev, "failed to map ocotp\n");
++ return -EFAULT;
++ }
++
++ val = readl_relaxed(base + OCOTP_CFG3);
++ iounmap(base);
+ }
+
+ /*
+@@ -319,7 +332,6 @@ static void imx6ul_opp_check_speed_gradi
+ * 2b'11: 900000000Hz on i.MX6ULL only;
+ * We need to set the max speed of ARM according to fuse map.
+ */
+- val = readl_relaxed(base + OCOTP_CFG3);
+ val >>= OCOTP_CFG3_SPEED_SHIFT;
+ val &= 0x3;
+
+@@ -339,9 +351,7 @@ static void imx6ul_opp_check_speed_gradi
+ dev_warn(dev, "failed to disable 900MHz OPP\n");
+ }
+
+- iounmap(base);
+-put_node:
+- of_node_put(np);
++ return ret;
+ }
+
+ static int imx6q_cpufreq_probe(struct platform_device *pdev)
+@@ -399,10 +409,18 @@ static int imx6q_cpufreq_probe(struct pl
+ }
+
+ if (of_machine_is_compatible("fsl,imx6ul") ||
+- of_machine_is_compatible("fsl,imx6ull"))
+- imx6ul_opp_check_speed_grading(cpu_dev);
+- else
++ of_machine_is_compatible("fsl,imx6ull")) {
++ ret = imx6ul_opp_check_speed_grading(cpu_dev);
++ if (ret == -EPROBE_DEFER)
++ return ret;
++ if (ret) {
++ dev_err(cpu_dev, "failed to read ocotp: %d\n",
++ ret);
++ return ret;
++ }
++ } else {
+ imx6q_opp_check_speed_grading(cpu_dev);
++ }
+
+ /* Because we have added the OPPs here, we must free them */
+ free_opp = true;
--- /dev/null
+From 6da3eced8c5f3b03340b0c395bacd552c4d52411 Mon Sep 17 00:00:00 2001
+From: "Jason A. Donenfeld" <Jason@zx2c4.com>
+Date: Mon, 23 Dec 2019 14:31:47 +0100
+Subject: powerpc/spinlocks: Include correct header for static key
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Jason A. Donenfeld <Jason@zx2c4.com>
+
+commit 6da3eced8c5f3b03340b0c395bacd552c4d52411 upstream.
+
+Recently, the spinlock implementation grew a static key optimization,
+but the jump_label.h header include was left out, leading to build
+errors:
+
+ linux/arch/powerpc/include/asm/spinlock.h:44:7: error: implicit declaration of function ‘static_branch_unlikely’
+ 44 | if (!static_branch_unlikely(&shared_processor))
+
+This commit adds the missing header.
+
+mpe: The build break is only seen with CONFIG_JUMP_LABEL=n.
+
+Fixes: 656c21d6af5d ("powerpc/shared: Use static key to detect shared processor")
+Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
+Reviewed-by: Srikar Dronamraju <srikar@linux.ibm.com>
+Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
+Link: https://lore.kernel.org/r/20191223133147.129983-1-Jason@zx2c4.com
+Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/powerpc/include/asm/spinlock.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/powerpc/include/asm/spinlock.h
++++ b/arch/powerpc/include/asm/spinlock.h
+@@ -19,6 +19,7 @@
+ *
+ * (the type definitions are in asm/spinlock_types.h)
+ */
++#include <linux/jump_label.h>
+ #include <linux/irqflags.h>
+ #ifdef CONFIG_PPC64
+ #include <asm/paca.h>
--- /dev/null
+From 14c73bd344da60abaf7da3ea2e7733ddda35bbac Mon Sep 17 00:00:00 2001
+From: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
+Date: Thu, 5 Dec 2019 14:02:17 +0530
+Subject: powerpc/vcpu: Assume dedicated processors as non-preempt
+
+From: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
+
+commit 14c73bd344da60abaf7da3ea2e7733ddda35bbac upstream.
+
+With commit 247f2f6f3c70 ("sched/core: Don't schedule threads on
+pre-empted vCPUs"), the scheduler avoids preempted vCPUs to schedule
+tasks on wakeup. This leads to wrong choice of CPU, which in-turn
+leads to larger wakeup latencies. Eventually, it leads to performance
+regression in latency sensitive benchmarks like soltp, schbench etc.
+
+On Powerpc, vcpu_is_preempted() only looks at yield_count. If the
+yield_count is odd, the vCPU is assumed to be preempted. However
+yield_count is increased whenever the LPAR enters CEDE state (idle).
+So any CPU that has entered CEDE state is assumed to be preempted.
+
+Even if vCPU of dedicated LPAR is preempted/donated, it should have
+right of first-use since they are supposed to own the vCPU.
+
+On a Power9 System with 32 cores:
+ # lscpu
+ Architecture: ppc64le
+ Byte Order: Little Endian
+ CPU(s): 128
+ On-line CPU(s) list: 0-127
+ Thread(s) per core: 8
+ Core(s) per socket: 1
+ Socket(s): 16
+ NUMA node(s): 2
+ Model: 2.2 (pvr 004e 0202)
+ Model name: POWER9 (architected), altivec supported
+ Hypervisor vendor: pHyp
+ Virtualization type: para
+ L1d cache: 32K
+ L1i cache: 32K
+ L2 cache: 512K
+ L3 cache: 10240K
+ NUMA node0 CPU(s): 0-63
+ NUMA node1 CPU(s): 64-127
+
+ # perf stat -a -r 5 ./schbench
+ v5.4 v5.4 + patch
+ Latency percentiles (usec) Latency percentiles (usec)
+ 50.0000th: 45 50.0th: 45
+ 75.0000th: 62 75.0th: 63
+ 90.0000th: 71 90.0th: 74
+ 95.0000th: 77 95.0th: 78
+ *99.0000th: 91 *99.0th: 82
+ 99.5000th: 707 99.5th: 83
+ 99.9000th: 6920 99.9th: 86
+ min=0, max=10048 min=0, max=96
+ Latency percentiles (usec) Latency percentiles (usec)
+ 50.0000th: 45 50.0th: 46
+ 75.0000th: 61 75.0th: 64
+ 90.0000th: 72 90.0th: 75
+ 95.0000th: 79 95.0th: 79
+ *99.0000th: 691 *99.0th: 83
+ 99.5000th: 3972 99.5th: 85
+ 99.9000th: 8368 99.9th: 91
+ min=0, max=16606 min=0, max=117
+ Latency percentiles (usec) Latency percentiles (usec)
+ 50.0000th: 45 50.0th: 46
+ 75.0000th: 61 75.0th: 64
+ 90.0000th: 71 90.0th: 75
+ 95.0000th: 77 95.0th: 79
+ *99.0000th: 106 *99.0th: 83
+ 99.5000th: 2364 99.5th: 84
+ 99.9000th: 7480 99.9th: 90
+ min=0, max=10001 min=0, max=95
+ Latency percentiles (usec) Latency percentiles (usec)
+ 50.0000th: 45 50.0th: 47
+ 75.0000th: 62 75.0th: 65
+ 90.0000th: 72 90.0th: 75
+ 95.0000th: 78 95.0th: 79
+ *99.0000th: 93 *99.0th: 84
+ 99.5000th: 108 99.5th: 85
+ 99.9000th: 6792 99.9th: 90
+ min=0, max=17681 min=0, max=117
+ Latency percentiles (usec) Latency percentiles (usec)
+ 50.0000th: 46 50.0th: 45
+ 75.0000th: 62 75.0th: 64
+ 90.0000th: 73 90.0th: 75
+ 95.0000th: 79 95.0th: 79
+ *99.0000th: 113 *99.0th: 82
+ 99.5000th: 2724 99.5th: 83
+ 99.9000th: 6184 99.9th: 93
+ min=0, max=9887 min=0, max=111
+
+ Performance counter stats for 'system wide' (5 runs):
+
+ context-switches 43,373 ( +- 0.40% ) 44,597 ( +- 0.55% )
+ cpu-migrations 1,211 ( +- 5.04% ) 220 ( +- 6.23% )
+ page-faults 15,983 ( +- 5.21% ) 15,360 ( +- 3.38% )
+
+Waiman Long suggested using static_keys.
+
+Fixes: 247f2f6f3c70 ("sched/core: Don't schedule threads on pre-empted vCPUs")
+Cc: stable@vger.kernel.org # v4.18+
+Reported-by: Parth Shah <parth@linux.ibm.com>
+Reported-by: Ihor Pasichnyk <Ihor.Pasichnyk@ibm.com>
+Tested-by: Juri Lelli <juri.lelli@redhat.com>
+Acked-by: Waiman Long <longman@redhat.com>
+Reviewed-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
+Signed-off-by: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
+Acked-by: Phil Auld <pauld@redhat.com>
+Reviewed-by: Vaidyanathan Srinivasan <svaidy@linux.ibm.com>
+Tested-by: Parth Shah <parth@linux.ibm.com>
+[mpe: Move the key and setting of the key to pseries/setup.c]
+Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
+Link: https://lore.kernel.org/r/20191213035036.6913-1-mpe@ellerman.id.au
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/powerpc/include/asm/spinlock.h | 4 +++-
+ arch/powerpc/platforms/pseries/setup.c | 7 +++++++
+ 2 files changed, 10 insertions(+), 1 deletion(-)
+
+--- a/arch/powerpc/include/asm/spinlock.h
++++ b/arch/powerpc/include/asm/spinlock.h
+@@ -53,10 +53,12 @@
+ #endif
+
+ #ifdef CONFIG_PPC_PSERIES
++DECLARE_STATIC_KEY_FALSE(shared_processor);
++
+ #define vcpu_is_preempted vcpu_is_preempted
+ static inline bool vcpu_is_preempted(int cpu)
+ {
+- if (!firmware_has_feature(FW_FEATURE_SPLPAR))
++ if (!static_branch_unlikely(&shared_processor))
+ return false;
+ return !!(be32_to_cpu(lppaca_of(cpu).yield_count) & 1);
+ }
+--- a/arch/powerpc/platforms/pseries/setup.c
++++ b/arch/powerpc/platforms/pseries/setup.c
+@@ -75,6 +75,9 @@
+ #include "pseries.h"
+ #include "../../../../drivers/pci/pci.h"
+
++DEFINE_STATIC_KEY_FALSE(shared_processor);
++EXPORT_SYMBOL_GPL(shared_processor);
++
+ int CMO_PrPSP = -1;
+ int CMO_SecPSP = -1;
+ unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
+@@ -761,6 +764,10 @@ static void __init pSeries_setup_arch(vo
+
+ if (firmware_has_feature(FW_FEATURE_LPAR)) {
+ vpa_init(boot_cpuid);
++
++ if (lppaca_shared_proc(get_lppaca()))
++ static_branch_enable(&shared_processor);
++
+ ppc_md.power_save = pseries_lpar_idle;
+ ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
+ #ifdef CONFIG_PCI_IOV
parisc-fix-compiler-warnings-in-debug_core.c.patch
llc2-fix-return-statement-of-llc_stat_ev_rx_null_dsa.patch
hv_netvsc-fix-unwanted-rx_table-reset.patch
+powerpc-vcpu-assume-dedicated-processors-as-non-preempt.patch
+powerpc-spinlocks-include-correct-header-for-static-key.patch
+cpufreq-imx6q-read-ocotp-through-nvmem-for-imx6ul-imx6ull.patch
+arm-dts-imx6ul-use-nvmem-cells-for-cpu-speed-grading.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
