arm64: dts: exynos: re-order Slim SSS clocks to match dtschema

The dtschema expects pclk (APB clock) followed by aclk (AXI/AHB clock):

  arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml:
    slim-sss@11140000: clock-names:0: 'pclk' was expected
  arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml:
    slim-sss@11140000: clock-names:1: 'aclk' was expected

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20210212163729.69882-1-krzk@kernel.org

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 6433f9ee35e19b4cfd19f6b1f6d191f5a794e5f2..18a912eee36054aec10806a70b8d6e1b5c3167c5 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -564,9 +564,9 @@
                        compatible = "samsung,exynos5433-slim-sss";
                        reg = <0x11140000 0x1000>;
                        interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
-                       clock-names = "aclk", "pclk";
-                       clocks = <&cmu_imem CLK_ACLK_SLIMSSS>,
-                                <&cmu_imem CLK_PCLK_SLIMSSS>;
+                       clock-names = "pclk", "aclk";
+                       clocks = <&cmu_imem CLK_PCLK_SLIMSSS>,
+                                <&cmu_imem CLK_ACLK_SLIMSSS>;
                };
 
                pd_gscl: power-domain@105c4000 {