pinctrl: renesas: r8a779h0: Remove CC5_OSCOUT

Rev.0.71 of the R-Car V4M Series Hardware User’s Manual removed the
"CC5_OSCOUT" signal from the pin control register tables.  As this is
further unused in the pin control driver, it can be removed safely.

Signed-off-by: Huy Bui <huy.bui.wm@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/895bb560467309706931d14aeea0e063ad0e86eb.1762274384.git.geert+renesas@glider.be

diff --git a/drivers/pinctrl/renesas/pfc-r8a779h0.c b/drivers/pinctrl/renesas/pfc-r8a779h0.c
index 63b3725a0cf6ff6bf50e7ee13f27391ceea8bcae..cee7690ea19d0db8f73ffbfaec647197bcaf2ce4 100644 (file)
--- a/drivers/pinctrl/renesas/pfc-r8a779h0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779h0.c
@@ -478,7 +478,7 @@
 /* IP0SR7 */           /* 0 */                 /* 1 */                 /* 2 */         /* 3            4        5        6        7        8        9        A        B        C        D        E        F */
 #define IP0SR7_3_0     FM(AVB0_AVTP_PPS)       FM(AVB0_MII_COL)        F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
 #define IP0SR7_7_4     FM(AVB0_AVTP_CAPTURE)   FM(AVB0_MII_CRS)        F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR7_11_8    FM(AVB0_AVTP_MATCH)     FM(AVB0_MII_RX_ER)      FM(CC5_OSCOUT)  F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR7_11_8    FM(AVB0_AVTP_MATCH)     FM(AVB0_MII_RX_ER)      F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
 #define IP0SR7_15_12   FM(AVB0_TD3)            FM(AVB0_MII_TD3)        F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
 #define IP0SR7_19_16   FM(AVB0_LINK)           FM(AVB0_MII_TX_ER)      F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
 #define IP0SR7_23_20   FM(AVB0_PHY_INT)        F_(0, 0)                F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -1123,7 +1123,6 @@ static const u16 pinmux_data[] = {
 
        PINMUX_IPSR_GPSR(IP0SR7_11_8,   AVB0_AVTP_MATCH),
        PINMUX_IPSR_GPSR(IP0SR7_11_8,   AVB0_MII_RX_ER),
-       PINMUX_IPSR_GPSR(IP0SR7_11_8,   CC5_OSCOUT),
 
        PINMUX_IPSR_GPSR(IP0SR7_15_12,  AVB0_TD3),
        PINMUX_IPSR_GPSR(IP0SR7_15_12,  AVB0_MII_TD3),