]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
clk: stm32mp1: move stm32mp1 clock driver into stm32 directory
authorGabriel Fernandez <gabriel.fernandez@foss.st.com>
Fri, 8 Dec 2023 14:36:56 +0000 (15:36 +0100)
committerStephen Boyd <sboyd@kernel.org>
Sun, 17 Dec 2023 23:33:26 +0000 (15:33 -0800)
Move all STM32MP clock drivers into same directory (stm32).

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Link: https://lore.kernel.org/r/20231208143700.354785-2-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/Kconfig
drivers/clk/Makefile
drivers/clk/stm32/Kconfig [new file with mode: 0644]
drivers/clk/stm32/Makefile
drivers/clk/stm32/clk-stm32mp1.c [moved from drivers/clk/clk-stm32mp1.c with 100% similarity]

index c30d0d396f7a30a1e44a9898b5be658b01017525..50af5fc7f5708035baa797ebdf1afcdcc1bcbde8 100644 (file)
@@ -414,16 +414,6 @@ config COMMON_CLK_VC7
          Renesas Versaclock7 is a family of configurable clock generator
          and jitter attenuator ICs with fractional and integer dividers.
 
-config COMMON_CLK_STM32MP135
-       def_bool COMMON_CLK && MACH_STM32MP13
-       help
-         Support for stm32mp135 SoC family clocks
-
-config COMMON_CLK_STM32MP157
-       def_bool COMMON_CLK && MACH_STM32MP157
-       help
-         Support for stm32mp157 SoC family clocks
-
 config COMMON_CLK_STM32F
        def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
        help
@@ -504,6 +494,7 @@ source "drivers/clk/starfive/Kconfig"
 source "drivers/clk/sunxi/Kconfig"
 source "drivers/clk/sunxi-ng/Kconfig"
 source "drivers/clk/tegra/Kconfig"
+source "drivers/clk/stm32/Kconfig"
 source "drivers/clk/ti/Kconfig"
 source "drivers/clk/uniphier/Kconfig"
 source "drivers/clk/visconti/Kconfig"
index ed71f2e0ee36740c3f81a785b2f9b47509899cca..14fa8d4ecc1fbe939f00d6072f97c7899d9fac51 100644 (file)
@@ -70,7 +70,6 @@ obj-$(CONFIG_COMMON_CLK_SI570)                += clk-si570.o
 obj-$(CONFIG_COMMON_CLK_SP7021)                += clk-sp7021.o
 obj-$(CONFIG_COMMON_CLK_STM32F)                += clk-stm32f4.o
 obj-$(CONFIG_COMMON_CLK_STM32H7)       += clk-stm32h7.o
-obj-$(CONFIG_COMMON_CLK_STM32MP157)    += clk-stm32mp1.o
 obj-$(CONFIG_COMMON_CLK_TPS68470)      += clk-tps68470.o
 obj-$(CONFIG_CLK_TWL6040)              += clk-twl6040.o
 obj-$(CONFIG_CLK_TWL)                  += clk-twl.o
diff --git a/drivers/clk/stm32/Kconfig b/drivers/clk/stm32/Kconfig
new file mode 100644 (file)
index 0000000..3c8493a
--- /dev/null
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: GPL-2.0-only
+# common clock support for STMicroelectronics SoC family.
+
+menuconfig COMMON_CLK_STM32MP
+       bool "Clock support for common STM32MP clocks"
+       depends on ARCH_STM32 || COMPILE_TEST
+       default y
+       select RESET_CONTROLLER
+       help
+         Support for STM32MP SoC family clocks.
+
+if COMMON_CLK_STM32MP
+
+config COMMON_CLK_STM32MP135
+       bool "Clock driver for stm32mp13x clocks"
+       depends on ARM || COMPILE_TEST
+       default y
+       help
+         Support for stm32mp13x SoC family clocks.
+
+config COMMON_CLK_STM32MP157
+       bool "Clock driver for stm32mp15x clocks"
+       depends on ARM || COMPILE_TEST
+       default y
+       help
+         Support for stm32mp15x SoC family clocks.
+
+endif
+
index 95bd2230bba07383ac6d3c5346b71aafa761ba18..c154ef3e88f9dfb615d9ecbe6fa367da46dd2e23 100644 (file)
@@ -1 +1,2 @@
 obj-$(CONFIG_COMMON_CLK_STM32MP135)    += clk-stm32mp13.o clk-stm32-core.o reset-stm32.o
+obj-$(CONFIG_COMMON_CLK_STM32MP157)    += clk-stm32mp1.o