drop 2 amd patches from 4.9

diff --git a/queue-4.9/drm-amd-powerplay-smu7-add-vblank-check-for-mclk-switching-v2.patch b/queue-4.9/drm-amd-powerplay-smu7-add-vblank-check-for-mclk-switching-v2.patch
deleted file mode 100644 (file)
index e683eb1..0000000
--- a/queue-4.9/drm-amd-powerplay-smu7-add-vblank-check-for-mclk-switching-v2.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From 09be4a5219610a6fae3215d4f51f948d6f5d2609 Mon Sep 17 00:00:00 2001
-From: Alex Deucher <alexander.deucher@amd.com>
-Date: Thu, 11 May 2017 13:46:12 -0400
-Subject: drm/amd/powerplay/smu7: add vblank check for mclk switching (v2)
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-From: Alex Deucher <alexander.deucher@amd.com>
-
-commit 09be4a5219610a6fae3215d4f51f948d6f5d2609 upstream.
-
-Check to make sure the vblank period is long enough to support
-mclk switching.
-
-v2: drop needless initial assignment (Nils)
-
-bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
-
-Acked-by: Christian König <christian.koenig@amd.com>
-Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c |   31 ++++++++++++++++++++---
- 1 file changed, 27 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
-+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
-@@ -2495,6 +2495,28 @@ static int smu7_get_power_state_size(str
-       return sizeof(struct smu7_power_state);
- }
- 
-+static int smu7_vblank_too_short(struct pp_hwmgr *hwmgr,
-+                               uint32_t vblank_time_us)
-+{
-+      struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
-+      uint32_t switch_limit_us;
-+
-+      switch (hwmgr->chip_id) {
-+      case CHIP_POLARIS10:
-+      case CHIP_POLARIS11:
-+      case CHIP_POLARIS12:
-+              switch_limit_us = data->is_memory_gddr5 ? 190 : 150;
-+              break;
-+      default:
-+              switch_limit_us = data->is_memory_gddr5 ? 450 : 150;
-+              break;
-+      }
-+
-+      if (vblank_time_us < switch_limit_us)
-+              return true;
-+      else
-+              return false;
-+}
- 
- static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
-                               struct pp_power_state *request_ps,
-@@ -2509,6 +2531,7 @@ static int smu7_apply_state_adjust_rules
-       bool disable_mclk_switching;
-       bool disable_mclk_switching_for_frame_lock;
-       struct cgs_display_info info = {0};
-+      struct cgs_mode_info mode_info = {0};
-       const struct phm_clock_and_voltage_limits *max_limits;
-       uint32_t i;
-       struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
-@@ -2517,6 +2540,7 @@ static int smu7_apply_state_adjust_rules
-       int32_t count;
-       int32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0;
- 
-+      info.mode_info = &mode_info;
-       data->battery_state = (PP_StateUILabel_Battery ==
-                       request_ps->classification.ui_label);
- 
-@@ -2543,8 +2567,6 @@ static int smu7_apply_state_adjust_rules
- 
-       cgs_get_active_displays_info(hwmgr->device, &info);
- 
--      /*TO DO result = PHM_CheckVBlankTime(hwmgr, &vblankTooShort);*/
--
-       minimum_clocks.engineClock = hwmgr->display_config.min_core_set_clock;
-       minimum_clocks.memoryClock = hwmgr->display_config.min_mem_set_clock;
- 
-@@ -2609,8 +2631,9 @@ static int smu7_apply_state_adjust_rules
-                                   PHM_PlatformCaps_DisableMclkSwitchingForFrameLock);
- 
- 
--      disable_mclk_switching = (1 < info.display_count) ||
--                                  disable_mclk_switching_for_frame_lock;
-+      disable_mclk_switching = ((1 < info.display_count) ||
-+                                disable_mclk_switching_for_frame_lock ||
-+                                smu7_vblank_too_short(hwmgr, mode_info.vblank_time_us));
- 
-       sclk = smu7_ps->performance_levels[0].engine_clock;
-       mclk = smu7_ps->performance_levels[0].memory_clock;

diff --git a/queue-4.9/drm-amd-powerplay-smu7-disable-mclk-switching-for-high-refresh-rates.patch b/queue-4.9/drm-amd-powerplay-smu7-disable-mclk-switching-for-high-refresh-rates.patch
deleted file mode 100644 (file)
index 23d14d9..0000000
--- a/queue-4.9/drm-amd-powerplay-smu7-disable-mclk-switching-for-high-refresh-rates.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 2275a3a2fe9914ba6d76c8ea490da3c08342bd19 Mon Sep 17 00:00:00 2001
-From: Alex Deucher <alexander.deucher@amd.com>
-Date: Thu, 11 May 2017 13:57:41 -0400
-Subject: drm/amd/powerplay/smu7: disable mclk switching for high refresh rates
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-From: Alex Deucher <alexander.deucher@amd.com>
-
-commit 2275a3a2fe9914ba6d76c8ea490da3c08342bd19 upstream.
-
-Even if the vblank period would allow it, it still seems to
-be problematic on some cards.
-
-bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
-
-Acked-by: Christian König <christian.koenig@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
-+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
-@@ -2633,7 +2633,8 @@ static int smu7_apply_state_adjust_rules
- 
-       disable_mclk_switching = ((1 < info.display_count) ||
-                                 disable_mclk_switching_for_frame_lock ||
--                                smu7_vblank_too_short(hwmgr, mode_info.vblank_time_us));
-+                                smu7_vblank_too_short(hwmgr, mode_info.vblank_time_us) ||
-+                                (mode_info.refresh_rate > 120));
- 
-       sclk = smu7_ps->performance_levels[0].engine_clock;
-       mclk = smu7_ps->performance_levels[0].memory_clock;

diff --git a/queue-4.9/series b/queue-4.9/series
index 4a09c63c21bf5c206a0823cfdb9d4d64b55c56fd..9255228e0a450c49a01456204612aaae1726196b 100644 (file)
--- a/queue-4.9/series
+++ b/queue-4.9/series
@@ -51,8 +51,6 @@ nvme-rdma-support-devices-with-queue-size-32.patch
 nvme-use-blk_mq_start_hw_queues-in-nvme_kill_queues.patch
 nvme-avoid-to-use-blk_mq_abort_requeue_list.patch
 scsi-mpt3sas-force-request-partial-completion-alignment.patch
-drm-amd-powerplay-smu7-add-vblank-check-for-mclk-switching-v2.patch
-drm-amd-powerplay-smu7-disable-mclk-switching-for-high-refresh-rates.patch
 drm-radeon-ci-disable-mclk-switching-for-high-refresh-rates-v2.patch
 drm-radeon-unbreak-hpd-handling-for-r600.patch
 drm-radeon-fix-vram_size-visible-values-in-drm_radeon_gem_info-ioctl.patch