Match: Add int type fits check for .SAT_ADD imm operand

This patch would like to add strict check for imm operand of .SAT_ADD
matching.  We have no type checking for imm operand in previous, which
may result in unexpected IL to be catched by .SAT_ADD pattern.

We leverage the int_fits_type_p here to make sure the imm operand is
a int type fits the result type of the .SAT_ADD.  For example:

Fits uint8_t:
uint8_t a;
uint8_t sum = .SAT_ADD (a, 12);
uint8_t sum = .SAT_ADD (a, 12u);
uint8_t sum = .SAT_ADD (a, 126u);
uint8_t sum = .SAT_ADD (a, 128u);
uint8_t sum = .SAT_ADD (a, 228);
uint8_t sum = .SAT_ADD (a, 223u);

Not fits uint8_t:
uint8_t a;
uint8_t sum = .SAT_ADD (a, -1);
uint8_t sum = .SAT_ADD (a, 256u);
uint8_t sum = .SAT_ADD (a, 257);

The below test suite are passed for this patch:
* The rv64gcv fully regression test.
* The x86 bootstrap test.
* The x86 fully regression test.

gcc/ChangeLog:

	* match.pd: Add int_fits_type_p check for .SAT_ADD imm operand.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/sat_arith.h: Add test helper macros.
	* gcc.target/riscv/sat_u_add_imm-11.c: Adjust test case for imm.
	* gcc.target/riscv/sat_u_add_imm-12.c: Ditto.
	* gcc.target/riscv/sat_u_add_imm-15.c: Ditto.
	* gcc.target/riscv/sat_u_add_imm-16.c: Ditto.
	* gcc.target/riscv/sat_u_add_imm_type_check-1.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-10.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-11.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-12.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-13.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-14.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-15.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-16.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-17.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-18.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-19.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-2.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-20.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-21.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-22.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-23.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-24.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-25.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-26.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-27.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-28.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-29.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-3.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-30.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-31.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-32.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-33.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-34.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-35.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-36.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-37.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-38.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-39.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-4.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-40.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-41.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-42.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-43.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-44.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-45.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-46.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-47.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-48.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-49.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-5.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-50.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-51.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-52.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-6.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-7.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-8.c: New test.
	* gcc.target/riscv/sat_u_add_imm_type_check-9.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>

diff --git a/gcc/match.pd b/gcc/match.pd
index 78f1957e8c78a0523c229b2293f8eb0f4d586492..5ee60963c9046e62d948e948a222cd584a5fd51e 100644 (file)
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -3190,7 +3190,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
  (cond^ (ne (imagpart (IFN_ADD_OVERFLOW@2 @0 INTEGER_CST@1)) integer_zerop)
   integer_minus_onep (realpart @2))
   (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type)
-      && types_match (type, @0))))
+       && types_match (type, @0) && int_fits_type_p (@1, type))))
 
 /* Unsigned saturation sub, case 1 (branch with gt):
    SAT_U_SUB = X > Y ? X - Y : 0  */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_arith.h b/gcc/testsuite/gcc.target/riscv/sat_arith.h
index d3f7b5836c793762c3fef315d3dcc51216228683..4eca73586c873b7320752a825295575d1162528b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat_arith.h
@@ -90,6 +90,22 @@ sat_u_add_imm##IMM##_##T##_fmt_4 (T x)                          \
   return __builtin_add_overflow (x, IMM, &ret) == 0 ? ret : -1; \
 }
 
+#define DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(T, IMM)         \
+T __attribute__((noinline))                                \
+sat_u_add_imm_type_check##_##T##_fmt_1 (T x)               \
+{                                                          \
+  T ret;                                                   \
+  return __builtin_add_overflow (x, IMM, &ret) ? -1 : ret; \
+}
+
+#define DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(T, IMM)              \
+T __attribute__((noinline))                                     \
+sat_u_add_imm_type_check##_##T##_fmt_2 (T x)                    \
+{                                                               \
+  T ret;                                                        \
+  return __builtin_add_overflow (x, IMM, &ret) == 0 ? ret : -1; \
+}
+
 #define RUN_SAT_U_ADD_IMM_FMT_1(T, x, IMM, expect) \
   if (sat_u_add_imm##IMM##_##T##_fmt_1(x) != expect) __builtin_abort ()
 

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-11.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-11.c
index 43f34b5f3c98bcd3d85c9d5d365c7400e0b9e556..a246e9b18578731b2d6ffe7d3f0011f6383cdd20 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-11.c
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-11.c
@@ -5,7 +5,7 @@
 #include "sat_arith.h"
 
 /*
-** sat_u_add_imm7_uint32_t_fmt_3:
+** sat_u_add_imm7u_uint32_t_fmt_3:
 ** slli\s+[atx][0-9]+,\s*a0,\s*32
 ** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
 ** addi\s+[atx][0-9]+,\s*a0,\s*7
@@ -17,6 +17,6 @@
 ** sext.w\s+a0,\s*a0
 ** ret
 */
-DEF_SAT_U_ADD_IMM_FMT_3(uint32_t, 7)
+DEF_SAT_U_ADD_IMM_FMT_3(uint32_t, 7u)
 
 /* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-12.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-12.c
index 561c127f5fae73296f7929a24051630b298d8fad..143f14c3af0591ac8a6202879f39cbe164a80c5c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-12.c
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-12.c
@@ -5,13 +5,13 @@
 #include "sat_arith.h"
 
 /*
-** sat_u_add_imm8_uint64_t_fmt_3:
+** sat_u_add_imm8ull_uint64_t_fmt_3:
 ** addi\s+[atx][0-9]+,\s*a0,\s*8
 ** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
 ** neg\s+[atx][0-9]+,\s*[atx][0-9]+
 ** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
 ** ret
 */
-DEF_SAT_U_ADD_IMM_FMT_3(uint64_t, 8)
+DEF_SAT_U_ADD_IMM_FMT_3(uint64_t, 8ull)
 
 /* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-15.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-15.c
index eeea574bba223a0abb8965d75223d96596c09bb2..995a02bffff2b7ee1abd498e0585fe2a74790b98 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-15.c
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-15.c
@@ -5,7 +5,7 @@
 #include "sat_arith.h"
 
 /*
-** sat_u_add_imm7_uint32_t_fmt_4:
+** sat_u_add_imm7u_uint32_t_fmt_4:
 ** slli\s+[atx][0-9]+,\s*a0,\s*32
 ** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
 ** addi\s+[atx][0-9]+,\s*a0,\s*7
@@ -17,6 +17,6 @@
 ** sext.w\s+a0,\s*a0
 ** ret
 */
-DEF_SAT_U_ADD_IMM_FMT_4(uint32_t, 7)
+DEF_SAT_U_ADD_IMM_FMT_4(uint32_t, 7u)
 
 /* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-16.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-16.c
index 307b81589ee8ff1558539ddce36d0008b9b414db..65e5a4a99bbbdd6a13f8005eac38c870801c38d2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm-16.c
@@ -5,13 +5,13 @@
 #include "sat_arith.h"
 
 /*
-** sat_u_add_imm8_uint64_t_fmt_4:
+** sat_u_add_imm8ull_uint64_t_fmt_4:
 ** addi\s+[atx][0-9]+,\s*a0,\s*8
 ** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
 ** neg\s+[atx][0-9]+,\s*[atx][0-9]+
 ** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
 ** ret
 */
-DEF_SAT_U_ADD_IMM_FMT_4(uint64_t, 8)
+DEF_SAT_U_ADD_IMM_FMT_4(uint64_t, 8ull)
 
 /* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-1.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-1.c
new file mode 100644 (file)
index 0000000..db4b0be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-1.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint8_t, 9)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-10.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-10.c
new file mode 100644 (file)
index 0000000..37ec6e9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-10.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint16_t, 52767)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-11.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-11.c
new file mode 100644 (file)
index 0000000..8dca3b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-11.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint16_t, 65534u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-12.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-12.c
new file mode 100644 (file)
index 0000000..f3cde55
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-12.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint16_t, -3)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-13.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-13.c
new file mode 100644 (file)
index 0000000..61834e7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-13.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint16_t, 65549)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-14.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-14.c
new file mode 100644 (file)
index 0000000..74e9298
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-14.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint16_t, 67732u)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-15.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-15.c
new file mode 100644 (file)
index 0000000..f5d60e9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-15.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint32_t, 91)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-16.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-16.c
new file mode 100644 (file)
index 0000000..e7742b3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-16.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint32_t, 2147483644u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-17.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-17.c
new file mode 100644 (file)
index 0000000..1437206
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-17.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint32_t, 2147483944)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-18.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-18.c
new file mode 100644 (file)
index 0000000..4ef47e2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-18.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint32_t, 4294967293u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-19.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-19.c
new file mode 100644 (file)
index 0000000..3df6acf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-19.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint32_t, -3433)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-2.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-2.c
new file mode 100644 (file)
index 0000000..ab69971
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-2.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint8_t, 126u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-20.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-20.c
new file mode 100644 (file)
index 0000000..b504faf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-20.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint32_t, 4294967342ll)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-21.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-21.c
new file mode 100644 (file)
index 0000000..55e5683
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-21.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint32_t, 4994967342ull)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-22.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-22.c
new file mode 100644 (file)
index 0000000..fdd6863
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-22.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint64_t, 439)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-23.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-23.c
new file mode 100644 (file)
index 0000000..f6e9b6b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-23.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint64_t, 576460752303423482u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-24.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-24.c
new file mode 100644 (file)
index 0000000..1d73286
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-24.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint64_t, 576460752303483482)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-25.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-25.c
new file mode 100644 (file)
index 0000000..9f8dd6b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-25.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint64_t, 976460752303483482u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-26.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-26.c
new file mode 100644 (file)
index 0000000..988a557
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-26.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint64_t, -39294)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-27.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-27.c
new file mode 100644 (file)
index 0000000..9b14324
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-27.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint8_t, 9)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-28.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-28.c
new file mode 100644 (file)
index 0000000..781699c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-28.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint8_t, 126u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-29.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-29.c
new file mode 100644 (file)
index 0000000..7aa0720
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-29.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint8_t, 129)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-3.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-3.c
new file mode 100644 (file)
index 0000000..ea49c6b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-3.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint8_t, 129)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-30.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-30.c
new file mode 100644 (file)
index 0000000..467b9d9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-30.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint8_t, 254u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-31.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-31.c
new file mode 100644 (file)
index 0000000..6a144a7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-31.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint8_t, -3)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-32.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-32.c
new file mode 100644 (file)
index 0000000..2cc1912
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-32.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint8_t, 267)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-33.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-33.c
new file mode 100644 (file)
index 0000000..c94716d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-33.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint8_t, 287u)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-34.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-34.c
new file mode 100644 (file)
index 0000000..9b38133
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-34.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint16_t, 9)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-35.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-35.c
new file mode 100644 (file)
index 0000000..4b5c6fa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-35.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint16_t, 32767u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-36.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-36.c
new file mode 100644 (file)
index 0000000..903df49
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-36.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint16_t, 52767)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-37.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-37.c
new file mode 100644 (file)
index 0000000..ff30c20
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-37.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint16_t, 65534u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-38.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-38.c
new file mode 100644 (file)
index 0000000..45e06e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-38.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint16_t, -3)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-39.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-39.c
new file mode 100644 (file)
index 0000000..659352e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-39.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint16_t, 65549)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-4.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-4.c
new file mode 100644 (file)
index 0000000..c9a33ed
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-4.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint8_t, 254u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-40.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-40.c
new file mode 100644 (file)
index 0000000..a16776a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-40.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint16_t, 67732u)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-41.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-41.c
new file mode 100644 (file)
index 0000000..edcad09
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-41.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint32_t, 91)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-42.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-42.c
new file mode 100644 (file)
index 0000000..8d37bba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-42.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint32_t, 2147483644u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-43.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-43.c
new file mode 100644 (file)
index 0000000..5976d6e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-43.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint32_t, 2147483944)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-44.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-44.c
new file mode 100644 (file)
index 0000000..f19edb2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-44.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint32_t, 4294967293u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-45.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-45.c
new file mode 100644 (file)
index 0000000..0a48aca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-45.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint32_t, -3433)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-46.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-46.c
new file mode 100644 (file)
index 0000000..26d293e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-46.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint32_t, 4294967342ll)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-47.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-47.c
new file mode 100644 (file)
index 0000000..37bf026
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-47.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint32_t, 4994967342ull)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-48.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-48.c
new file mode 100644 (file)
index 0000000..f16c68e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-48.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint64_t, 439)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-49.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-49.c
new file mode 100644 (file)
index 0000000..ec2b557
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-49.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint64_t, 576460752303423482u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-5.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-5.c
new file mode 100644 (file)
index 0000000..1e21831
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-5.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint8_t, -3)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-50.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-50.c
new file mode 100644 (file)
index 0000000..752ca6f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-50.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint64_t, 576460752303483482)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-51.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-51.c
new file mode 100644 (file)
index 0000000..b9fe726
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-51.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint64_t, 976460752303483482u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-52.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-52.c
new file mode 100644 (file)
index 0000000..f1afecb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-52.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_2(uint64_t, -39294)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-6.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-6.c
new file mode 100644 (file)
index 0000000..0370857
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-6.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint8_t, 267)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-7.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-7.c
new file mode 100644 (file)
index 0000000..660635e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-7.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint8_t, 287u)
+
+/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-8.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-8.c
new file mode 100644 (file)
index 0000000..38da62d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-8.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint16_t, 9)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-9.c b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-9.c
new file mode 100644 (file)
index 0000000..baf81b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_add_imm_type_check-9.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_U_ADD_IMM_TYPE_CHECK_FMT_1(uint16_t, 32767u)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */