]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
airoha: an7581: correctly attach the USB2 PHY for 3rd PCIe line
authorChristian Marangi <ansuelsmth@gmail.com>
Tue, 28 Oct 2025 12:17:38 +0000 (13:17 +0100)
committerChristian Marangi <ansuelsmth@gmail.com>
Tue, 28 Oct 2025 12:17:38 +0000 (13:17 +0100)
The 3rd PCIe line use the USB2 serdes for PCIe operation. Correctly set
it to the DT node so that the mode can be correctly set in the PHY
driver.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
target/linux/airoha/dts/an7581.dtsi

index 367779e544f62939c206bed9ac3b651177d7919a..32bc6b5df7d5fbeedae2938d0147d25778c82cfb 100644 (file)
                        clocks = <&scuclk EN7523_CLK_PCIE>;
                        clock-names = "sys-ck";
 
-                       phys = <&pciephy>;
+                       phys = <&usb1_phy PHY_TYPE_USB3>;
                        phy-names = "pcie-phy";
 
                        ranges = <0x02000000 0 0x28000000 0x0 0x28000000 0 0x4000000>;