re PR tree-optimization/34046 (verify_flow_info failed)

	PR tree-optimization/34046
	* cfg.c (update_bb_profile_for_threading): Avoid the division for the
	scaling if the old probability is greater than the new base.

From-SVN: r130185

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cf9b33ed65a873f8d336030c2da91596afbafd7e..e13903d497ff8e664b764350d4d91711bda4a207 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2007-11-14  Eric Botcazou  <ebotcazou@libertysurf.fr>
+
+       PR tree-optimization/34046
+       * cfg.c (update_bb_profile_for_threading): Avoid the division for the
+       scaling if the old probability is greater than the new base.
+
 2007-11-14  Sebastian Pop  <sebastian.pop@amd.com>
 
        * tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Remove

diff --git a/gcc/cfg.c b/gcc/cfg.c
index 40e51a520410f6943813266d03b70d0127b2ddc0..0b0e9503b2b7141d6fb6009bd7f80d93a673e777 100644 (file)
--- a/gcc/cfg.c
+++ b/gcc/cfg.c
@@ -990,9 +990,15 @@ update_bb_profile_for_threading (basic_block bb, int edge_frequency,
 
       FOR_EACH_EDGE (c, ei, bb->succs)
        {
-         c->probability = RDIV (c->probability * scale, 65536);
-         if (c->probability > REG_BR_PROB_BASE)
+         /* Protect from overflow due to additional scaling.  */
+         if (c->probability > prob)
            c->probability = REG_BR_PROB_BASE;
+         else
+           {
+             c->probability = RDIV (c->probability * scale, 65536);
+             if (c->probability > REG_BR_PROB_BASE)
+               c->probability = REG_BR_PROB_BASE;
+           }
        }
     }
 

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 04d52eaa805bc6824289c62eb95c9e0175768f91..ee8faa567282a81acb1fb64cb0f17cc81b252f7f 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2007-11-14  Eric Botcazou  <ebotcazou@libertysurf.fr>
+
+       * gcc.c-torture/compile/20071114-1.c: New test.
+
 2007-11-13  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
 
        PR fortran/31608

diff --git a/gcc/testsuite/gcc.c-torture/compile/20071114-1.c b/gcc/testsuite/gcc.c-torture/compile/20071114-1.c
new file mode 100644 (file)
index 0000000..ddfbfef
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/20071114-1.c
@@ -0,0 +1,113 @@
+/* PR tree-optimization/34046 */
+/* Origin: dcb <dcb314@hotmail.com> */
+
+typedef unsigned char bool8;
+typedef unsigned char uint8_t;
+typedef unsigned short int uint16_t;
+typedef unsigned int uint32_t;
+typedef uint8_t uint8;
+typedef uint16_t uint16;
+typedef uint32_t uint32;
+
+struct SIAPU
+{
+    uint8 *PC;
+    uint8 *RAM;
+    uint8 Bit;
+    uint32 Address;
+    uint8 *WaitAddress1;
+    uint8 *WaitAddress2;
+    uint8 _Carry;
+};
+
+struct SAPU
+{
+    bool8 ShowROM;
+    uint8 OutPorts [4];
+    uint8 ExtraRAM [64];
+    uint16 TimerTarget [3];
+};
+
+struct SAPU APU;
+struct SIAPU IAPU;
+
+void S9xSetAPUControl (uint8 byte);
+void S9xSetAPUDSP (uint8 byte);
+uint8 S9xGetAPUDSP ();
+
+uint8 S9xAPUGetByte (uint32 Address)
+{
+  Address &= 0xffff;
+
+  if (Address <= 0xff && Address >= 0xf0)
+    {
+      if (Address >= 0xf4 && Address <= 0xf7)
+       {
+         IAPU.WaitAddress2 = IAPU.WaitAddress1;
+         IAPU.WaitAddress1 = IAPU.PC;
+         return (IAPU.RAM [Address]);
+       }
+      else if (Address == 0xf3)
+       return (S9xGetAPUDSP ());
+
+      if (Address >= 0xfd)
+       {
+         IAPU.WaitAddress2 = IAPU.WaitAddress1;
+         IAPU.WaitAddress1 = IAPU.PC;
+         uint8 t = IAPU.RAM [Address];
+         IAPU.RAM [Address] = 0;
+         return (t);
+       }
+
+      return (IAPU.RAM [Address]);
+    }
+ else
+   return (IAPU.RAM [Address]);
+}
+
+void S9xAPUSetByte (uint8 byte, uint32 Address)
+{
+  Address &= 0xffff;
+
+  if (Address <= 0xff && Address >= 0xf0)
+    {
+      if (Address == 0xf3)
+       S9xSetAPUDSP (byte);
+      else if (Address >= 0xf4 && Address <= 0xf7)
+       APU.OutPorts [Address - 0xf4] = byte;
+      else if (Address == 0xf1)
+       S9xSetAPUControl (byte);
+      else if (Address < 0xfd)
+       {
+         IAPU.RAM [Address] = byte;
+         if (Address >= 0xfa)
+           {
+             if (byte == 0)
+               APU.TimerTarget [Address - 0xfa] = 0x100;
+             else
+               APU.TimerTarget [Address - 0xfa] = byte;
+           }
+       }
+    }
+  else
+    {
+      if (Address < 0xffc0)
+       IAPU.RAM [Address] = byte;
+      else
+       {
+         APU.ExtraRAM [Address - 0xffc0] = byte;
+         if (!APU.ShowROM)
+           IAPU.RAM [Address] = byte;
+       }
+    }
+}
+
+void ApuCA ()
+{
+  IAPU.Address = *(uint16 *) (IAPU.PC + 1);
+  IAPU.Bit = (uint8)(IAPU.Address >> 13);
+  if ((IAPU._Carry))
+    S9xAPUSetByte (S9xAPUGetByte (IAPU.Address) | (1 << IAPU.Bit), IAPU.Address);
+  else
+    S9xAPUSetByte (S9xAPUGetByte (IAPU.Address) & ~(1 << IAPU.Bit), IAPU.Address);
+}