]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
powerpc/pseries/npu: Enable platform support
authorAlexey Kardashevskiy <aik@ozlabs.ru>
Wed, 19 Dec 2018 08:52:19 +0000 (19:52 +1100)
committerMichael Ellerman <mpe@ellerman.id.au>
Fri, 21 Dec 2018 05:20:46 +0000 (16:20 +1100)
We already changed NPU API for GPUs to not to call OPAL and the remaining
bit is initializing NPU structures.

This searches for POWER9 NVLinks attached to any device on a PHB and
initializes an NPU structure if any found.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/platforms/pseries/pci.c

index 41d8a4d1d02e352fd256106a6e68972d62fa1c4e..7725825d887d32903a699fdc2e26134f9b101100 100644 (file)
@@ -29,6 +29,7 @@
 #include <asm/pci-bridge.h>
 #include <asm/prom.h>
 #include <asm/ppc-pci.h>
+#include <asm/pci.h>
 #include "pseries.h"
 
 #if 0
@@ -237,6 +238,8 @@ static void __init pSeries_request_regions(void)
 
 void __init pSeries_final_fixup(void)
 {
+       struct pci_controller *hose;
+
        pSeries_request_regions();
 
        eeh_probe_devices();
@@ -246,6 +249,25 @@ void __init pSeries_final_fixup(void)
        ppc_md.pcibios_sriov_enable = pseries_pcibios_sriov_enable;
        ppc_md.pcibios_sriov_disable = pseries_pcibios_sriov_disable;
 #endif
+       list_for_each_entry(hose, &hose_list, list_node) {
+               struct device_node *dn = hose->dn, *nvdn;
+
+               while (1) {
+                       dn = of_find_all_nodes(dn);
+                       if (!dn)
+                               break;
+                       nvdn = of_parse_phandle(dn, "ibm,nvlink", 0);
+                       if (!nvdn)
+                               continue;
+                       if (!of_device_is_compatible(nvdn, "ibm,npu-link"))
+                               continue;
+                       if (!of_device_is_compatible(nvdn->parent,
+                                               "ibm,power9-npu"))
+                               continue;
+                       WARN_ON_ONCE(pnv_npu2_init(hose));
+                       break;
+               }
+       }
 }
 
 /*