unsigned int gen;
u32 caps[3];
u32 results[2];
- unsigned int lanes;
+ enum usb4_margining_lane lanes;
unsigned int min_ber_level;
unsigned int max_ber_level;
unsigned int ber_level;
}
if (!strcmp(buf, "0")) {
- margining->lanes = 0;
+ margining->lanes = USB4_MARGINING_LANE_RX0;
} else if (!strcmp(buf, "1")) {
- margining->lanes = 1;
+ margining->lanes = USB4_MARGINING_LANE_RX1;
} else if (!strcmp(buf, "all")) {
/* Needs to be supported */
if (all_lanes(margining))
- margining->lanes = 7;
+ margining->lanes = USB4_MARGINING_LANE_ALL;
else
ret = -EINVAL;
} else {
{
struct tb_margining *margining = s->private;
struct tb *tb = margining->port->sw->tb;
- unsigned int lanes;
+ enum usb4_margining_lane lanes;
if (mutex_lock_interruptible(&tb->lock))
return -ERESTARTSYS;
lanes = margining->lanes;
if (all_lanes(margining)) {
- if (!lanes)
+ if (lanes == USB4_MARGINING_LANE_RX0)
seq_puts(s, "[0] 1 all\n");
- else if (lanes == 1)
+ else if (lanes == USB4_MARGINING_LANE_RX1)
seq_puts(s, "0 [1] all\n");
else
seq_puts(s, "0 1 [all]\n");
} else {
- if (!lanes)
+ if (lanes == USB4_MARGINING_LANE_RX0)
seq_puts(s, "[0] 1\n");
else
seq_puts(s, "0 [1]\n");
if (ret)
break;
- if (margining->lanes == USB4_MARGIN_SW_LANE_0)
+ if (margining->lanes == USB4_MARGINING_LANE_RX0)
errors = FIELD_GET(USB4_MARGIN_SW_ERR_COUNTER_LANE_0_MASK,
margining->results[1]);
- else if (margining->lanes == USB4_MARGIN_SW_LANE_1)
+ else if (margining->lanes == USB4_MARGINING_LANE_RX1)
errors = FIELD_GET(USB4_MARGIN_SW_ERR_COUNTER_LANE_1_MASK,
margining->results[1]);
- else if (margining->lanes == USB4_MARGIN_SW_ALL_LANES)
+ else if (margining->lanes == USB4_MARGINING_LANE_ALL)
errors = margining->results[1];
/* Any errors stop the test */
if (margining->software) {
/* Clear the error counters */
margining_modify_error_counter(margining,
- USB4_MARGIN_SW_ALL_LANES,
+ USB4_MARGINING_LANE_ALL,
USB4_MARGIN_SW_ERROR_COUNTER_CLEAR);
}
seq_printf(s, "0x%08x\n", margining->results[1]);
if (margining->time) {
- if (!margining->lanes || margining->lanes == 7) {
+ if (margining->lanes == USB4_MARGINING_LANE_RX0 ||
+ margining->lanes == USB4_MARGINING_LANE_ALL) {
val = margining->results[1];
seq_puts(s, "# lane 0 right time margin: ");
time_margin_show(s, margining, val);
seq_puts(s, "# lane 0 left time margin: ");
time_margin_show(s, margining, val);
}
- if (margining->lanes == 1 || margining->lanes == 7) {
+ if (margining->lanes == USB4_MARGINING_LANE_RX1 ||
+ margining->lanes == USB4_MARGINING_LANE_ALL) {
val = margining->results[1] >>
USB4_MARGIN_HW_RES_1_L1_RH_MARGIN_SHIFT;
seq_puts(s, "# lane 1 right time margin: ");
time_margin_show(s, margining, val);
}
} else {
- if (!margining->lanes || margining->lanes == 7) {
+ if (margining->lanes == USB4_MARGINING_LANE_RX0 ||
+ margining->lanes == USB4_MARGINING_LANE_ALL) {
val = margining->results[1];
seq_puts(s, "# lane 0 high voltage margin: ");
voltage_margin_show(s, margining, val);
seq_puts(s, "# lane 0 low voltage margin: ");
voltage_margin_show(s, margining, val);
}
- if (margining->lanes == 1 || margining->lanes == 7) {
+ if (margining->lanes == USB4_MARGINING_LANE_RX1 ||
+ margining->lanes == USB4_MARGINING_LANE_ALL) {
val = margining->results[1] >>
USB4_MARGIN_HW_RES_1_L1_RH_MARGIN_SHIFT;
seq_puts(s, "# lane 1 high voltage margin: ");
u32 lane_errors, result;
seq_printf(s, "0x%08x\n", margining->results[1]);
- result = FIELD_GET(USB4_MARGIN_SW_LANES_MASK, margining->results[0]);
- if (result == USB4_MARGIN_SW_LANE_0 ||
- result == USB4_MARGIN_SW_ALL_LANES) {
+ result = FIELD_GET(USB4_MARGIN_SW_LANES_MASK, margining->results[0]);
+ if (result == USB4_MARGINING_LANE_RX0 ||
+ result == USB4_MARGINING_LANE_ALL) {
lane_errors = FIELD_GET(USB4_MARGIN_SW_ERR_COUNTER_LANE_0_MASK,
margining->results[1]);
seq_printf(s, "# lane 0 errors: %u\n", lane_errors);
}
- if (result == USB4_MARGIN_SW_LANE_1 ||
- result == USB4_MARGIN_SW_ALL_LANES) {
+ if (result == USB4_MARGINING_LANE_RX1 ||
+ result == USB4_MARGINING_LANE_ALL) {
lane_errors = FIELD_GET(USB4_MARGIN_SW_ERR_COUNTER_LANE_1_MASK,
margining->results[1]);
seq_printf(s, "# lane 1 errors: %u\n", lane_errors);
USB4_MARGIN_SW_ERROR_COUNTER_STOP,
};
+enum usb4_margining_lane {
+ USB4_MARGINING_LANE_RX0 = 0,
+ USB4_MARGINING_LANE_RX1 = 1,
+ USB4_MARGINING_LANE_ALL = 7,
+};
+
/**
* struct usb4_port_margining_params - USB4 margining parameters
* @error_counter: Error counter operation for software margining
* @ber_level: Current BER level contour value
- * @lanes: %0, %1 or %7 (all)
+ * @lanes: Lanes to enable for the margining operation
* @voltage_time_offset: Offset for voltage / time for software margining
* @optional_voltage_offset_range: Enable optional extended voltage range
* @right_high: %false if left/low margin test is performed, %true if right/high
struct usb4_port_margining_params {
enum usb4_margin_sw_error_counter error_counter;
u32 ber_level;
- u32 lanes;
+ enum usb4_margining_lane lanes;
u32 voltage_time_offset;
bool optional_voltage_offset_range;
bool right_high;