]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
RISC-V: Add missing mode_idx for vrol and vror
authorKito Cheng <kito.cheng@sifive.com>
Tue, 27 Aug 2024 13:27:02 +0000 (21:27 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Wed, 28 Aug 2024 01:13:18 +0000 (09:13 +0800)
We add pattern for vector rotate, but seems like we forgot adding
mode_idx which used in AVL propgation (riscv-avlprop.cc).

gcc/ChangeLog:

* config/riscv/vector.md (mode_idx): Add vrol and vror.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/rotr.c: New.

gcc/config/riscv/vector.md
gcc/testsuite/gcc.target/riscv/rvv/autovec/rotr.c [new file with mode: 0644]

index 666719330c69f141361560f469af8f4b8d477403..d0677325ba1d4a987c76c4394be312b8d089ff6d 100644 (file)
                                vfcmp,vfminmax,vfsgnj,vfclass,vfmerge,vfmov,\
                                vfcvtitof,vfncvtitof,vfncvtftoi,vfncvtftof,vmalu,vmiota,vmidx,\
                                vimovxv,vfmovfv,vslideup,vslidedown,vislide1up,vislide1down,vfslide1up,vfslide1down,\
-                               vgather,vcompress,vmov,vnclip,vnshift,vandn,vcpop,vclz,vctz")
+                               vgather,vcompress,vmov,vnclip,vnshift,vandn,vcpop,vclz,vctz,vrol,vror")
               (const_int 0)
 
               (eq_attr "type" "vimovvx,vfmovvf")
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/rotr.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/rotr.c
new file mode 100644 (file)
index 0000000..055b28d
--- /dev/null
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_zvbb -mabi=lp64d -fno-vect-cost-model -mrvv-vector-bits=zvl" } */
+
+typedef int a;
+void *b;
+a c;
+void d() {
+  a e = c, f =0;
+  short *g = b;
+  for (; f < e; f++)
+    *(g + f) = (255 & (*(g + f) >> 8)) | *(g + f) << 8;
+}
+