pinctrl: samsung: Add ARTPEC-9 SoC specific configuration

Add Axis ARTPEC-9 SoC specific configuration data to enable pinctrl.

Signed-off-by: SeonGu Kang <ksk4725@coasia.com>
Signed-off-by: Ravi Patel <ravi.patel@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
index 3258147deccad26bcb18caf2bb53ba9f2f6775cc..627dca504d7a924f273abd3796e87c816d9be535 100644 (file)
--- a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
@@ -2023,3 +2023,52 @@ const struct samsung_pinctrl_of_match_data artpec8_of_data __initconst = {
        .ctrl           = artpec8_pin_ctrl,
        .num_ctrl       = ARRAY_SIZE(artpec8_pin_ctrl),
 };
+
+/* pin banks of artpec9 pin-controller (FSYS0) */
+static const struct samsung_pin_bank_data artpec9_pin_banks0[] __initconst = {
+       ARTPEC_PIN_BANK_EINTG(8, 0x000, "gpf0", 0x00),
+       ARTPEC_PIN_BANK_EINTG(8, 0x020, "gpf1", 0x04),
+       ARTPEC_PIN_BANK_EINTG(8, 0x040, "gpe0", 0x08),
+       ARTPEC_PIN_BANK_EINTG(8, 0x060, "gpe1", 0x0c),
+       ARTPEC_PIN_BANK_EINTG(8, 0x080, "gpe2", 0x10),
+       ARTPEC_PIN_BANK_EINTG(8, 0x0a0, "gpe3", 0x14),
+       ARTPEC_PIN_BANK_EINTG(2, 0x0c0, "gpe4", 0x18),
+       ARTPEC_PIN_BANK_EINTG(8, 0x0e0, "gps0", 0x1c),
+       ARTPEC_PIN_BANK_EINTG(8, 0x100, "gps1", 0x20),
+       ARTPEC_PIN_BANK_EINTG(5, 0x120, "gpi0", 0x24),
+};
+
+/* pin banks of artpec9 pin-controller (FSYS1) */
+static const struct samsung_pin_bank_data artpec9_pin_banks1[] __initconst = {
+       ARTPEC_PIN_BANK_EINTG(2, 0x000, "gpu0", 0x00),
+};
+
+/* pin banks of artpec9 pin-controller (PERIC) */
+static const struct samsung_pin_bank_data artpec9_pin_banks2[] __initconst = {
+       ARTPEC_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
+       ARTPEC_PIN_BANK_EINTG(8, 0x020, "gpa1", 0x04),
+};
+
+static const struct samsung_pin_ctrl artpec9_pin_ctrl[] __initconst = {
+       {
+               /* pin-controller instance 0 FSYS0 data */
+               .pin_banks      = artpec9_pin_banks0,
+               .nr_banks       = ARRAY_SIZE(artpec9_pin_banks0),
+               .eint_gpio_init = exynos_eint_gpio_init,
+       }, {
+               /* pin-controller instance 1 FSYS1 data */
+               .pin_banks      = artpec9_pin_banks1,
+               .nr_banks       = ARRAY_SIZE(artpec9_pin_banks1),
+               .eint_gpio_init = exynos_eint_gpio_init,
+       }, {
+               /* pin-controller instance 2 PERIC data */
+               .pin_banks      = artpec9_pin_banks2,
+               .nr_banks       = ARRAY_SIZE(artpec9_pin_banks2),
+               .eint_gpio_init = exynos_eint_gpio_init,
+       },
+};
+
+const struct samsung_pinctrl_of_match_data artpec9_of_data __initconst = {
+       .ctrl           = artpec9_pin_ctrl,
+       .num_ctrl       = ARRAY_SIZE(artpec9_pin_ctrl),
+};

diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c
index 7974122799c4fb0940a328037405398339820e78..e374effba25a76cdd69fb5da8d80dd8cf660298a 100644 (file)
--- a/drivers/pinctrl/samsung/pinctrl-samsung.c
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.c
@@ -1484,6 +1484,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = {
 #ifdef CONFIG_PINCTRL_EXYNOS_ARM64
        { .compatible = "axis,artpec8-pinctrl",
                .data = &artpec8_of_data },
+       { .compatible = "axis,artpec9-pinctrl",
+               .data = &artpec9_of_data },
        { .compatible = "google,gs101-pinctrl",
                .data = &gs101_of_data },
        { .compatible = "samsung,exynos2200-pinctrl",

diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h
index d00079ad673ceaa04165b183dfbdbe07c948ade8..0f7b2ea981586800ecf7f40b81c51b339ffb538f 100644 (file)
--- a/drivers/pinctrl/samsung/pinctrl-samsung.h
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.h
@@ -382,6 +382,7 @@ struct samsung_pmx_func {
 
 /* list of all exported SoC specific data */
 extern const struct samsung_pinctrl_of_match_data artpec8_of_data;
+extern const struct samsung_pinctrl_of_match_data artpec9_of_data;
 extern const struct samsung_pinctrl_of_match_data exynos2200_of_data;
 extern const struct samsung_pinctrl_of_match_data exynos3250_of_data;
 extern const struct samsung_pinctrl_of_match_data exynos4210_of_data;