--- /dev/null
+From 999b8b88c6060adf7a9b7907740ae86ace65291e Mon Sep 17 00:00:00 2001
+From: Vincent Bernat <vincent@bernat.im>
+Date: Sat, 15 Aug 2015 15:49:13 +0200
+Subject: 9p: ensure err is initialized to 0 in p9_client_read/write
+
+From: Vincent Bernat <vincent@bernat.im>
+
+commit 999b8b88c6060adf7a9b7907740ae86ace65291e upstream.
+
+Some use of those functions were providing unitialized values to those
+functions. Notably, when reading 0 bytes from an empty file on a 9P
+filesystem, the return code of read() was not 0.
+
+Tested with this simple program:
+
+ #include <assert.h>
+ #include <sys/types.h>
+ #include <sys/stat.h>
+ #include <fcntl.h>
+ #include <unistd.h>
+
+ int main(int argc, const char **argv)
+ {
+ assert(argc == 2);
+ char buffer[256];
+ int fd = open(argv[1], O_RDONLY|O_NOCTTY);
+ assert(fd >= 0);
+ assert(read(fd, buffer, 0) == 0);
+ return 0;
+ }
+
+Signed-off-by: Vincent Bernat <vincent@bernat.im>
+Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ net/9p/client.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/net/9p/client.c
++++ b/net/9p/client.c
+@@ -1541,6 +1541,7 @@ p9_client_read(struct p9_fid *fid, u64 o
+ struct p9_client *clnt = fid->clnt;
+ struct p9_req_t *req;
+ int total = 0;
++ *err = 0;
+
+ p9_debug(P9_DEBUG_9P, ">>> TREAD fid %d offset %llu %d\n",
+ fid->fid, (unsigned long long) offset, (int)iov_iter_count(to));
+@@ -1616,6 +1617,7 @@ p9_client_write(struct p9_fid *fid, u64
+ struct p9_client *clnt = fid->clnt;
+ struct p9_req_t *req;
+ int total = 0;
++ *err = 0;
+
+ p9_debug(P9_DEBUG_9P, ">>> TWRITE fid %d offset %llu count %zd\n",
+ fid->fid, (unsigned long long) offset,
--- /dev/null
+From 7a7184b01aa9deb86df661c6f7cbcf69a95b728c Mon Sep 17 00:00:00 2001
+From: "Guillermo A. Amaral" <g@maral.me>
+Date: Tue, 25 Aug 2015 23:29:13 -0700
+Subject: Add factory recertified Crucial M500s to blacklist
+
+From: "Guillermo A. Amaral" <g@maral.me>
+
+commit 7a7184b01aa9deb86df661c6f7cbcf69a95b728c upstream.
+
+The Crucial M500 is known to have issues with queued TRIM commands, the
+factory recertified SSDs use a different model number naming convention
+which causes them to get ignored by the blacklist.
+
+The new naming convention boils down to: s/Crucial_/FC/
+
+Signed-off-by: Guillermo A. Amaral <g@maral.me>
+Signed-off-by: Tejun Heo <tj@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/ata/libata-core.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/ata/libata-core.c
++++ b/drivers/ata/libata-core.c
+@@ -4230,6 +4230,8 @@ static const struct ata_blacklist_entry
+ ATA_HORKAGE_ZERO_AFTER_TRIM, },
+ { "Samsung SSD 8*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
+ ATA_HORKAGE_ZERO_AFTER_TRIM, },
++ { "FCCT*M500*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
++ ATA_HORKAGE_ZERO_AFTER_TRIM, },
+
+ /* devices that don't properly handle TRIM commands */
+ { "SuperSSpeed S238*", NULL, ATA_HORKAGE_NOTRIM, },
--- /dev/null
+From 63059a272398ef5dc1bd7065a036e8b6e82d1af7 Mon Sep 17 00:00:00 2001
+From: Grygorii Strashko <grygorii.strashko@ti.com>
+Date: Fri, 14 Aug 2015 15:20:28 +0300
+Subject: ARM: OMAP: wakeupgen: Restore the irq_set_type() mechanism
+
+From: Grygorii Strashko <grygorii.strashko@ti.com>
+
+commit 63059a272398ef5dc1bd7065a036e8b6e82d1af7 upstream.
+
+The conversion of the wakeupgen irqchip to hierarchical irq domains
+failed to provide a mechanism to properly set the trigger type of an
+interrupt.
+
+The wakeupgen irq chip itself has no mechanism and therefor no
+irq_set_type() callback. The code before the conversion relayed the
+trigger configuration directly to the underlying GIC.
+
+Restore the correct behaviour by setting the wakeupgen irq_set_type
+callback to irq_chip_set_type_parent(). This propagates the
+set_trigger() call to the underlying GIC irqchip.
+
+[ tglx: Massaged changelog ]
+
+Fixes: 7136d457f365 ('ARM: omap: convert wakeupgen to stacked domains')
+Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
+Acked-by: Tony Lindgren <tony@atomide.com>
+Cc: Sudeep Holla <sudeep.holla@arm.com>
+Cc: <linux@arm.linux.org.uk>
+Cc: <nsekhar@ti.com>
+Cc: <jason@lakedaemon.net>
+Cc: <balbi@ti.com>
+Cc: <linux-arm-kernel@lists.infradead.org>
+Cc: <marc.zyngier@arm.com>
+Link: http://lkml.kernel.org/r/1439554830-19502-5-git-send-email-grygorii.strashko@ti.com
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/mach-omap2/omap-wakeupgen.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/mach-omap2/omap-wakeupgen.c
++++ b/arch/arm/mach-omap2/omap-wakeupgen.c
+@@ -392,6 +392,7 @@ static struct irq_chip wakeupgen_chip =
+ .irq_mask = wakeupgen_mask,
+ .irq_unmask = wakeupgen_unmask,
+ .irq_retrigger = irq_chip_retrigger_hierarchy,
++ .irq_set_type = irq_chip_set_type_parent,
+ .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND,
+ #ifdef CONFIG_SMP
+ .irq_set_affinity = irq_chip_set_affinity_parent,
--- /dev/null
+From 126c69a0bd0e441bf6766a5d9bf20de011be9f68 Mon Sep 17 00:00:00 2001
+From: Marc Zyngier <marc.zyngier@arm.com>
+Date: Thu, 27 Aug 2015 16:10:01 +0100
+Subject: arm64: KVM: Fix host crash when injecting a fault into a 32bit guest
+
+From: Marc Zyngier <marc.zyngier@arm.com>
+
+commit 126c69a0bd0e441bf6766a5d9bf20de011be9f68 upstream.
+
+When injecting a fault into a misbehaving 32bit guest, it seems
+rather idiotic to also inject a 64bit fault that is only going
+to corrupt the guest state. This leads to a situation where we
+perform an illegal exception return at EL2 causing the host
+to crash instead of killing the guest.
+
+Just fix the stupid bug that has been there from day 1.
+
+Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Tested-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/kvm/inject_fault.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/arch/arm64/kvm/inject_fault.c
++++ b/arch/arm64/kvm/inject_fault.c
+@@ -168,8 +168,8 @@ void kvm_inject_dabt(struct kvm_vcpu *vc
+ {
+ if (!(vcpu->arch.hcr_el2 & HCR_RW))
+ inject_abt32(vcpu, false, addr);
+-
+- inject_abt64(vcpu, false, addr);
++ else
++ inject_abt64(vcpu, false, addr);
+ }
+
+ /**
+@@ -184,8 +184,8 @@ void kvm_inject_pabt(struct kvm_vcpu *vc
+ {
+ if (!(vcpu->arch.hcr_el2 & HCR_RW))
+ inject_abt32(vcpu, true, addr);
+-
+- inject_abt64(vcpu, true, addr);
++ else
++ inject_abt64(vcpu, true, addr);
+ }
+
+ /**
+@@ -198,6 +198,6 @@ void kvm_inject_undefined(struct kvm_vcp
+ {
+ if (!(vcpu->arch.hcr_el2 & HCR_RW))
+ inject_undef32(vcpu);
+-
+- inject_undef64(vcpu);
++ else
++ inject_undef64(vcpu);
+ }
--- /dev/null
+From b265da5a45ce60bd3d7505cc0eaa6cfba50946a1 Mon Sep 17 00:00:00 2001
+From: Shannon Zhao <shannon.zhao@linaro.org>
+Date: Mon, 29 Jun 2015 09:02:40 +0100
+Subject: arm64: perf: fix unassigned cpu_pmu->plat_device when probing PMU PPIs
+
+From: Shannon Zhao <shannon.zhao@linaro.org>
+
+commit b265da5a45ce60bd3d7505cc0eaa6cfba50946a1 upstream.
+
+Commit d795ef9aa831 ("arm64: perf: don't warn about missing
+interrupt-affinity property for PPIs") added a check for PPIs so that
+we avoid parsing the interrupt-affinity property for these naturally
+affine interrupts.
+
+Unfortunately, this check can trigger an early (successful) return and
+we will not assign the value of cpu_pmu->plat_device. This patch fixes
+the issue.
+
+Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Cc: Kefeng Wang <wangkefeng.wang@huawei.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/kernel/perf_event.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/kernel/perf_event.c
++++ b/arch/arm64/kernel/perf_event.c
+@@ -1318,7 +1318,7 @@ static int armpmu_device_probe(struct pl
+ /* Don't bother with PPIs; they're already affine */
+ irq = platform_get_irq(pdev, 0);
+ if (irq >= 0 && irq_is_percpu(irq))
+- return 0;
++ goto out;
+
+ irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
+ if (!irqs)
+@@ -1355,6 +1355,7 @@ static int armpmu_device_probe(struct pl
+ else
+ kfree(irqs);
+
++out:
+ cpu_pmu->plat_device = pdev;
+ return 0;
+ }
--- /dev/null
+From 06b23f7fbbf26a025fd68395c7586949db586b47 Mon Sep 17 00:00:00 2001
+From: Marc Kleine-Budde <mkl@pengutronix.de>
+Date: Thu, 6 Aug 2015 09:48:34 +0200
+Subject: can: pcan_usb: don't provide CAN FD bittimings by non-FD adapters
+
+From: Marc Kleine-Budde <mkl@pengutronix.de>
+
+commit 06b23f7fbbf26a025fd68395c7586949db586b47 upstream.
+
+The CAN FD data bittiming constants are provided via netlink only when there
+are valid CAN FD constants available in priv->data_bittiming_const.
+
+Due to the indirection of pointer assignments in the peak_usb driver the
+priv->data_bittiming_const never becomes NULL - not even for non-FD adapters.
+
+The data_bittiming_const points to zero'ed data which leads to this result
+when running 'ip -details link show can0':
+
+35: can0: <NOARP,ECHO> mtu 16 qdisc noop state DOWN mode DEFAULT group default qlen 10
+ link/can promiscuity 0
+ can state STOPPED restart-ms 0
+ pcan_usb: tseg1 1..16 tseg2 1..8 sjw 1..4 brp 1..64 brp-inc 1
+ : dtseg1 0..0 dtseg2 0..0 dsjw 1..0 dbrp 0..0 dbrp-inc 0 <== BROKEN!
+ clock 8000000
+
+This patch changes the struct peak_usb_adapter::bittiming_const and struct
+peak_usb_adapter::data_bittiming_const to pointers to fix the assignemnt
+problems.
+
+Reported-by: Oliver Hartkopp <socketcan@hartkopp.net>
+Tested-by: Oliver Hartkopp <socketcan@hartkopp.net>
+Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/can/usb/peak_usb/pcan_usb.c | 24 +++---
+ drivers/net/can/usb/peak_usb/pcan_usb_core.c | 4 -
+ drivers/net/can/usb/peak_usb/pcan_usb_core.h | 4 -
+ drivers/net/can/usb/peak_usb/pcan_usb_fd.c | 96 ++++++++++++++-------------
+ drivers/net/can/usb/peak_usb/pcan_usb_pro.c | 24 +++---
+ 5 files changed, 82 insertions(+), 70 deletions(-)
+
+--- a/drivers/net/can/usb/peak_usb/pcan_usb.c
++++ b/drivers/net/can/usb/peak_usb/pcan_usb.c
+@@ -855,6 +855,18 @@ static int pcan_usb_probe(struct usb_int
+ /*
+ * describe the PCAN-USB adapter
+ */
++static const struct can_bittiming_const pcan_usb_const = {
++ .name = "pcan_usb",
++ .tseg1_min = 1,
++ .tseg1_max = 16,
++ .tseg2_min = 1,
++ .tseg2_max = 8,
++ .sjw_max = 4,
++ .brp_min = 1,
++ .brp_max = 64,
++ .brp_inc = 1,
++};
++
+ const struct peak_usb_adapter pcan_usb = {
+ .name = "PCAN-USB",
+ .device_id = PCAN_USB_PRODUCT_ID,
+@@ -863,17 +875,7 @@ const struct peak_usb_adapter pcan_usb =
+ .clock = {
+ .freq = PCAN_USB_CRYSTAL_HZ / 2 ,
+ },
+- .bittiming_const = {
+- .name = "pcan_usb",
+- .tseg1_min = 1,
+- .tseg1_max = 16,
+- .tseg2_min = 1,
+- .tseg2_max = 8,
+- .sjw_max = 4,
+- .brp_min = 1,
+- .brp_max = 64,
+- .brp_inc = 1,
+- },
++ .bittiming_const = &pcan_usb_const,
+
+ /* size of device private data */
+ .sizeof_dev_private = sizeof(struct pcan_usb),
+--- a/drivers/net/can/usb/peak_usb/pcan_usb_core.c
++++ b/drivers/net/can/usb/peak_usb/pcan_usb_core.c
+@@ -792,9 +792,9 @@ static int peak_usb_create_dev(const str
+ dev->ep_msg_out = peak_usb_adapter->ep_msg_out[ctrl_idx];
+
+ dev->can.clock = peak_usb_adapter->clock;
+- dev->can.bittiming_const = &peak_usb_adapter->bittiming_const;
++ dev->can.bittiming_const = peak_usb_adapter->bittiming_const;
+ dev->can.do_set_bittiming = peak_usb_set_bittiming;
+- dev->can.data_bittiming_const = &peak_usb_adapter->data_bittiming_const;
++ dev->can.data_bittiming_const = peak_usb_adapter->data_bittiming_const;
+ dev->can.do_set_data_bittiming = peak_usb_set_data_bittiming;
+ dev->can.do_set_mode = peak_usb_set_mode;
+ dev->can.do_get_berr_counter = peak_usb_adapter->do_get_berr_counter;
+--- a/drivers/net/can/usb/peak_usb/pcan_usb_core.h
++++ b/drivers/net/can/usb/peak_usb/pcan_usb_core.h
+@@ -48,8 +48,8 @@ struct peak_usb_adapter {
+ u32 device_id;
+ u32 ctrlmode_supported;
+ struct can_clock clock;
+- const struct can_bittiming_const bittiming_const;
+- const struct can_bittiming_const data_bittiming_const;
++ const struct can_bittiming_const * const bittiming_const;
++ const struct can_bittiming_const * const data_bittiming_const;
+ unsigned int ctrl_count;
+
+ int (*intf_probe)(struct usb_interface *intf);
+--- a/drivers/net/can/usb/peak_usb/pcan_usb_fd.c
++++ b/drivers/net/can/usb/peak_usb/pcan_usb_fd.c
+@@ -990,6 +990,30 @@ static void pcan_usb_fd_free(struct peak
+ }
+
+ /* describes the PCAN-USB FD adapter */
++static const struct can_bittiming_const pcan_usb_fd_const = {
++ .name = "pcan_usb_fd",
++ .tseg1_min = 1,
++ .tseg1_max = 64,
++ .tseg2_min = 1,
++ .tseg2_max = 16,
++ .sjw_max = 16,
++ .brp_min = 1,
++ .brp_max = 1024,
++ .brp_inc = 1,
++};
++
++static const struct can_bittiming_const pcan_usb_fd_data_const = {
++ .name = "pcan_usb_fd",
++ .tseg1_min = 1,
++ .tseg1_max = 16,
++ .tseg2_min = 1,
++ .tseg2_max = 8,
++ .sjw_max = 4,
++ .brp_min = 1,
++ .brp_max = 1024,
++ .brp_inc = 1,
++};
++
+ const struct peak_usb_adapter pcan_usb_fd = {
+ .name = "PCAN-USB FD",
+ .device_id = PCAN_USBFD_PRODUCT_ID,
+@@ -999,28 +1023,8 @@ const struct peak_usb_adapter pcan_usb_f
+ .clock = {
+ .freq = PCAN_UFD_CRYSTAL_HZ,
+ },
+- .bittiming_const = {
+- .name = "pcan_usb_fd",
+- .tseg1_min = 1,
+- .tseg1_max = 64,
+- .tseg2_min = 1,
+- .tseg2_max = 16,
+- .sjw_max = 16,
+- .brp_min = 1,
+- .brp_max = 1024,
+- .brp_inc = 1,
+- },
+- .data_bittiming_const = {
+- .name = "pcan_usb_fd",
+- .tseg1_min = 1,
+- .tseg1_max = 16,
+- .tseg2_min = 1,
+- .tseg2_max = 8,
+- .sjw_max = 4,
+- .brp_min = 1,
+- .brp_max = 1024,
+- .brp_inc = 1,
+- },
++ .bittiming_const = &pcan_usb_fd_const,
++ .data_bittiming_const = &pcan_usb_fd_data_const,
+
+ /* size of device private data */
+ .sizeof_dev_private = sizeof(struct pcan_usb_fd_device),
+@@ -1058,6 +1062,30 @@ const struct peak_usb_adapter pcan_usb_f
+ };
+
+ /* describes the PCAN-USB Pro FD adapter */
++static const struct can_bittiming_const pcan_usb_pro_fd_const = {
++ .name = "pcan_usb_pro_fd",
++ .tseg1_min = 1,
++ .tseg1_max = 64,
++ .tseg2_min = 1,
++ .tseg2_max = 16,
++ .sjw_max = 16,
++ .brp_min = 1,
++ .brp_max = 1024,
++ .brp_inc = 1,
++};
++
++static const struct can_bittiming_const pcan_usb_pro_fd_data_const = {
++ .name = "pcan_usb_pro_fd",
++ .tseg1_min = 1,
++ .tseg1_max = 16,
++ .tseg2_min = 1,
++ .tseg2_max = 8,
++ .sjw_max = 4,
++ .brp_min = 1,
++ .brp_max = 1024,
++ .brp_inc = 1,
++};
++
+ const struct peak_usb_adapter pcan_usb_pro_fd = {
+ .name = "PCAN-USB Pro FD",
+ .device_id = PCAN_USBPROFD_PRODUCT_ID,
+@@ -1067,28 +1095,8 @@ const struct peak_usb_adapter pcan_usb_p
+ .clock = {
+ .freq = PCAN_UFD_CRYSTAL_HZ,
+ },
+- .bittiming_const = {
+- .name = "pcan_usb_pro_fd",
+- .tseg1_min = 1,
+- .tseg1_max = 64,
+- .tseg2_min = 1,
+- .tseg2_max = 16,
+- .sjw_max = 16,
+- .brp_min = 1,
+- .brp_max = 1024,
+- .brp_inc = 1,
+- },
+- .data_bittiming_const = {
+- .name = "pcan_usb_pro_fd",
+- .tseg1_min = 1,
+- .tseg1_max = 16,
+- .tseg2_min = 1,
+- .tseg2_max = 8,
+- .sjw_max = 4,
+- .brp_min = 1,
+- .brp_max = 1024,
+- .brp_inc = 1,
+- },
++ .bittiming_const = &pcan_usb_pro_fd_const,
++ .data_bittiming_const = &pcan_usb_pro_fd_data_const,
+
+ /* size of device private data */
+ .sizeof_dev_private = sizeof(struct pcan_usb_fd_device),
+--- a/drivers/net/can/usb/peak_usb/pcan_usb_pro.c
++++ b/drivers/net/can/usb/peak_usb/pcan_usb_pro.c
+@@ -1004,6 +1004,18 @@ int pcan_usb_pro_probe(struct usb_interf
+ /*
+ * describe the PCAN-USB Pro adapter
+ */
++static const struct can_bittiming_const pcan_usb_pro_const = {
++ .name = "pcan_usb_pro",
++ .tseg1_min = 1,
++ .tseg1_max = 16,
++ .tseg2_min = 1,
++ .tseg2_max = 8,
++ .sjw_max = 4,
++ .brp_min = 1,
++ .brp_max = 1024,
++ .brp_inc = 1,
++};
++
+ const struct peak_usb_adapter pcan_usb_pro = {
+ .name = "PCAN-USB Pro",
+ .device_id = PCAN_USBPRO_PRODUCT_ID,
+@@ -1012,17 +1024,7 @@ const struct peak_usb_adapter pcan_usb_p
+ .clock = {
+ .freq = PCAN_USBPRO_CRYSTAL_HZ,
+ },
+- .bittiming_const = {
+- .name = "pcan_usb_pro",
+- .tseg1_min = 1,
+- .tseg1_max = 16,
+- .tseg2_min = 1,
+- .tseg2_max = 8,
+- .sjw_max = 4,
+- .brp_min = 1,
+- .brp_max = 1024,
+- .brp_inc = 1,
+- },
++ .bittiming_const = &pcan_usb_pro_const,
+
+ /* size of device private data */
+ .sizeof_dev_private = sizeof(struct pcan_usb_pro_device),
--- /dev/null
+From dbb3df2d58754e4df58620e60370d166c2cb6744 Mon Sep 17 00:00:00 2001
+From: Thierry Reding <treding@nvidia.com>
+Date: Fri, 14 Aug 2015 13:58:20 +0200
+Subject: drm/atmel-hlcdc: Compile suspend/resume for PM_SLEEP only
+
+From: Thierry Reding <treding@nvidia.com>
+
+commit dbb3df2d58754e4df58620e60370d166c2cb6744 upstream.
+
+If PM is enabled but PM_SLEEP is disabled, the suspend/resume functions
+are still unused and produce a compiler warning.
+
+Signed-off-by: Thierry Reding <treding@nvidia.com>
+Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
++++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
+@@ -559,7 +559,7 @@ static int atmel_hlcdc_dc_drm_remove(str
+ return 0;
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int atmel_hlcdc_dc_drm_suspend(struct device *dev)
+ {
+ struct drm_device *drm_dev = dev_get_drvdata(dev);
--- /dev/null
+From ed63baaf849e91c84ac3e042b1fd6a0af07c16f3 Mon Sep 17 00:00:00 2001
+From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
+Date: Tue, 18 Aug 2015 15:30:37 +0530
+Subject: drm/i915: Avoid TP3 on CHV
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
+
+commit ed63baaf849e91c84ac3e042b1fd6a0af07c16f3 upstream.
+
+This patch removes TP3 support on CHV since there is no support
+for HBR2 on this platform.
+
+v2: rename the function to indicate it checks source rates (Jani)
+v3: update comment to indicate TP3 dependency on HBR2 supported
+ hardware (Jani)
+
+Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
+[Jani: fixed a couple of checkpatch warnings.]
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_dp.c | 30 ++++++++++++++++++++++--------
+ 1 file changed, 22 insertions(+), 8 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_dp.c
++++ b/drivers/gpu/drm/i915/intel_dp.c
+@@ -1150,6 +1150,19 @@ intel_dp_sink_rates(struct intel_dp *int
+ return (intel_dp_max_link_bw(intel_dp) >> 3) + 1;
+ }
+
++static bool intel_dp_source_supports_hbr2(struct drm_device *dev)
++{
++ /* WaDisableHBR2:skl */
++ if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0)
++ return false;
++
++ if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || IS_BROADWELL(dev) ||
++ (INTEL_INFO(dev)->gen >= 9))
++ return true;
++ else
++ return false;
++}
++
+ static int
+ intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
+ {
+@@ -1163,12 +1176,8 @@ intel_dp_source_rates(struct drm_device
+
+ *source_rates = default_rates;
+
+- /* WaDisableHBR2:skl */
+- if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0)
+- return (DP_LINK_BW_2_7 >> 3) + 1;
+-
+- if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || IS_BROADWELL(dev) ||
+- (INTEL_INFO(dev)->gen >= 9))
++ /* This depends on the fact that 5.4 is last value in the array */
++ if (intel_dp_source_supports_hbr2(dev))
+ return (DP_LINK_BW_5_4 >> 3) + 1;
+ else
+ return (DP_LINK_BW_2_7 >> 3) + 1;
+@@ -3784,10 +3793,15 @@ intel_dp_get_dpcd(struct intel_dp *intel
+ }
+ }
+
+- /* Training Pattern 3 support, both source and sink */
++ /* Training Pattern 3 support, Intel platforms that support HBR2 alone
++ * have support for TP3 hence that check is used along with dpcd check
++ * to ensure TP3 can be enabled.
++ * SKL < B0: due it's WaDisableHBR2 is the only exception where TP3 is
++ * supported but still not enabled.
++ */
+ if (intel_dp->dpcd[DP_DPCD_REV] >= 0x12 &&
+ intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED &&
+- (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)) {
++ intel_dp_source_supports_hbr2(dev)) {
+ intel_dp->use_tps3 = true;
+ DRM_DEBUG_KMS("Displayport TPS3 supported\n");
+ } else
--- /dev/null
+From 903ecd0bb970438c3a60c2c33ec9032d6443bf67 Mon Sep 17 00:00:00 2001
+From: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Fri, 14 Aug 2015 12:59:19 +0100
+Subject: drm/i915: Flag the execlists context object as dirty after every use
+
+From: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 903ecd0bb970438c3a60c2c33ec9032d6443bf67 upstream.
+
+Everytime we use the logical context with execlists it becomes dirty (as
+the hardware will write the new register values afterwards, as well as
+the GPU state that will be used). We need to then flag the context as
+dirty everytime since after a swap-out/swap-in cycle the dirty flag will
+be cleared, and a further swap-out cycle will then loose the most recent
+GPU state.
+
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_lrc.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpu/drm/i915/intel_lrc.c
++++ b/drivers/gpu/drm/i915/intel_lrc.c
+@@ -848,6 +848,8 @@ static int intel_lr_context_pin(struct i
+ ret = intel_pin_and_map_ringbuffer_obj(ring->dev, ringbuf);
+ if (ret)
+ goto unpin_ctx_obj;
++
++ ctx_obj->dirty = true;
+ }
+
+ return ret;
--- /dev/null
+From 5e86dfe39f54ab13fd8079ac3d6cb100318909a3 Mon Sep 17 00:00:00 2001
+From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
+Date: Tue, 18 Aug 2015 11:07:57 +0530
+Subject: drm/i915: remove HBR2 from chv supported list
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
+
+commit 5e86dfe39f54ab13fd8079ac3d6cb100318909a3 upstream.
+
+This patch removes 5.4Gbps from supported link rate for CHV since
+it is not supported in it.
+
+v2: change the ordering for better readability (Ville)
+
+Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_dp.c | 7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_dp.c
++++ b/drivers/gpu/drm/i915/intel_dp.c
+@@ -1163,11 +1163,12 @@ intel_dp_source_rates(struct drm_device
+
+ *source_rates = default_rates;
+
++ /* WaDisableHBR2:skl */
+ if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0)
+- /* WaDisableHBR2:skl */
+ return (DP_LINK_BW_2_7 >> 3) + 1;
+- else if (INTEL_INFO(dev)->gen >= 8 ||
+- (IS_HASWELL(dev) && !IS_HSW_ULX(dev)))
++
++ if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || IS_BROADWELL(dev) ||
++ (INTEL_INFO(dev)->gen >= 9))
+ return (DP_LINK_BW_5_4 >> 3) + 1;
+ else
+ return (DP_LINK_BW_2_7 >> 3) + 1;
--- /dev/null
+From db196935d9562abec4510f48d887bc1f1e054fcf Mon Sep 17 00:00:00 2001
+From: Hiral Shah <hishah@cisco.com>
+Date: Tue, 14 Jul 2015 07:08:57 -0700
+Subject: fnic: Use the local variable instead of I/O flag to acquire io_req_lock in fnic_queuecommand() to avoid deadloack
+
+From: Hiral Shah <hishah@cisco.com>
+
+commit db196935d9562abec4510f48d887bc1f1e054fcf upstream.
+
+We added changes in fnic driver patch 1.6.0.16 to acquire
+io_req_lock in fnic_queuecommand() before issuing I/O so that io completion
+is serialized. But when releasing the lock we check for the I/O flag and
+this could be modified if IO abort occurs before I/O completion. In this case
+we wont release the lock and causes deadlock in some scenerios. Using the
+local variable to check the IO lock status will resolve the problem.
+
+Fixes: 41df7b02db82cf6c14f094757bac3830d10a827f
+Signed-off-by: Hiral Shah <hishah@cisco.com>
+Signed-off-by: Sesidhar Baddela <sebaddel@cisco.com>
+Signed-off-by: Anil Chintalapati <achintal@cisco.com>
+Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
+Signed-off-by: James Bottomley <JBottomley@Odin.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/scsi/fnic/fnic.h | 2 +-
+ drivers/scsi/fnic/fnic_scsi.c | 4 +++-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/scsi/fnic/fnic.h
++++ b/drivers/scsi/fnic/fnic.h
+@@ -39,7 +39,7 @@
+
+ #define DRV_NAME "fnic"
+ #define DRV_DESCRIPTION "Cisco FCoE HBA Driver"
+-#define DRV_VERSION "1.6.0.17"
++#define DRV_VERSION "1.6.0.17a"
+ #define PFX DRV_NAME ": "
+ #define DFX DRV_NAME "%d: "
+
+--- a/drivers/scsi/fnic/fnic_scsi.c
++++ b/drivers/scsi/fnic/fnic_scsi.c
+@@ -425,6 +425,7 @@ static int fnic_queuecommand_lck(struct
+ unsigned long ptr;
+ struct fc_rport_priv *rdata;
+ spinlock_t *io_lock = NULL;
++ int io_lock_acquired = 0;
+
+ if (unlikely(fnic_chk_state_flags_locked(fnic, FNIC_FLAGS_IO_BLOCKED)))
+ return SCSI_MLQUEUE_HOST_BUSY;
+@@ -518,6 +519,7 @@ static int fnic_queuecommand_lck(struct
+ spin_lock_irqsave(io_lock, flags);
+
+ /* initialize rest of io_req */
++ io_lock_acquired = 1;
+ io_req->port_id = rport->port_id;
+ io_req->start_time = jiffies;
+ CMD_STATE(sc) = FNIC_IOREQ_CMD_PENDING;
+@@ -571,7 +573,7 @@ out:
+ (((u64)CMD_FLAGS(sc) >> 32) | CMD_STATE(sc)));
+
+ /* if only we issued IO, will we have the io lock */
+- if (CMD_FLAGS(sc) & FNIC_IO_INITIALIZED)
++ if (io_lock_acquired)
+ spin_unlock_irqrestore(io_lock, flags);
+
+ atomic_dec(&fnic->in_flight);
--- /dev/null
+From 6d4affea7d5aa5ca5ff4c3e5fbf3ee16801cc527 Mon Sep 17 00:00:00 2001
+From: Grygorii Strashko <grygorii.strashko@ti.com>
+Date: Fri, 14 Aug 2015 15:20:25 +0300
+Subject: genirq: Don't return ENOSYS in irq_chip_retrigger_hierarchy
+
+From: Grygorii Strashko <grygorii.strashko@ti.com>
+
+commit 6d4affea7d5aa5ca5ff4c3e5fbf3ee16801cc527 upstream.
+
+irq_chip_retrigger_hierarchy() returns -ENOSYS if it was not able to
+find at least one .irq_retrigger() callback implemented in the IRQ
+domain hierarchy.
+
+That's wrong, because check_irq_resend() expects a 0 return value from
+the callback in case that the hardware assisted resend was not
+possible. If the return value is non zero the core code assumes
+hardware resend success and the software resend is not invoked.
+
+This results in lost interrupts on platforms where none of the parent
+irq chips in the hierarchy implements the retrigger callback.
+
+This is observable on TI OMAP, where the hierarchy is:
+
+ ARM GIC <- OMAP wakeupgen <- TI Crossbar
+
+Return 0 instead so the software resend mechanism gets invoked.
+
+[ tglx: Massaged changelog ]
+
+Fixes: 85f08c17de26 ('genirq: Introduce helper functions...')
+Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
+Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
+Reviewed-by: Jiang Liu <jiang.liu@linux.intel.com>
+Cc: Sudeep Holla <sudeep.holla@arm.com>
+Cc: <linux@arm.linux.org.uk>
+Cc: <nsekhar@ti.com>
+Cc: <jason@lakedaemon.net>
+Cc: <balbi@ti.com>
+Cc: <linux-arm-kernel@lists.infradead.org>
+Cc: <tony@atomide.com>
+Link: http://lkml.kernel.org/r/1439554830-19502-2-git-send-email-grygorii.strashko@ti.com
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ kernel/irq/chip.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/kernel/irq/chip.c
++++ b/kernel/irq/chip.c
+@@ -946,7 +946,7 @@ int irq_chip_retrigger_hierarchy(struct
+ if (data->chip && data->chip->irq_retrigger)
+ return data->chip->irq_retrigger(data);
+
+- return -ENOSYS;
++ return 0;
+ }
+
+ /**
--- /dev/null
+From b7560de198222994374c1340a389f12d5efb244a Mon Sep 17 00:00:00 2001
+From: Grygorii Strashko <grygorii.strashko@ti.com>
+Date: Fri, 14 Aug 2015 15:20:26 +0300
+Subject: genirq: Introduce irq_chip_set_type_parent() helper
+
+From: Grygorii Strashko <grygorii.strashko@ti.com>
+
+commit b7560de198222994374c1340a389f12d5efb244a upstream.
+
+This helper is required for irq chips which do not implement a
+irq_set_type callback and need to call down the irq domain hierarchy
+for the actual trigger type change.
+
+This helper is required to fix further wreckage caused by the
+conversion of TI OMAP to hierarchical irq domains and therefor tagged
+for stable.
+
+[ tglx: Massaged changelog ]
+
+Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
+Cc: Sudeep Holla <sudeep.holla@arm.com>
+Cc: <linux@arm.linux.org.uk>
+Cc: <nsekhar@ti.com>
+Cc: <jason@lakedaemon.net>
+Cc: <balbi@ti.com>
+Cc: <linux-arm-kernel@lists.infradead.org>
+Cc: <tony@atomide.com>
+Cc: <marc.zyngier@arm.com>
+Cc: stable@vger.kernel.org # 4.1
+Link: http://lkml.kernel.org/r/1439554830-19502-3-git-send-email-grygorii.strashko@ti.com
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ include/linux/irq.h | 1 +
+ kernel/irq/chip.c | 17 +++++++++++++++++
+ 2 files changed, 18 insertions(+)
+
+--- a/include/linux/irq.h
++++ b/include/linux/irq.h
+@@ -467,6 +467,7 @@ extern int irq_chip_set_affinity_parent(
+ const struct cpumask *dest,
+ bool force);
+ extern int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on);
++extern int irq_chip_set_type_parent(struct irq_data *data, unsigned int type);
+ #endif
+
+ /* Handling of unhandled and spurious interrupts: */
+--- a/kernel/irq/chip.c
++++ b/kernel/irq/chip.c
+@@ -934,6 +934,23 @@ int irq_chip_set_affinity_parent(struct
+ }
+
+ /**
++ * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
++ * @data: Pointer to interrupt specific data
++ * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
++ *
++ * Conditional, as the underlying parent chip might not implement it.
++ */
++int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
++{
++ data = data->parent_data;
++
++ if (data->chip->irq_set_type)
++ return data->chip->irq_set_type(data, type);
++
++ return -ENOSYS;
++}
++
++/**
+ * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
+ * @data: Pointer to interrupt specific data
+ *
--- /dev/null
+From 8200fe4347870d4ad6475048bcdf3e7c106c5268 Mon Sep 17 00:00:00 2001
+From: Grygorii Strashko <grygorii.strashko@ti.com>
+Date: Fri, 14 Aug 2015 15:20:30 +0300
+Subject: irqchip/crossbar: Restore set_wake functionality
+
+From: Grygorii Strashko <grygorii.strashko@ti.com>
+
+commit 8200fe4347870d4ad6475048bcdf3e7c106c5268 upstream.
+
+The TI crossbar irqchip doesn't provides any facility to configure the
+wakeup sources, but the conversion to hierarchical irqdomains set the
+irq_set_wake callback to irq_chip_set_wake_parent. The parent chip
+(OMAP wakeupgen) has no irq_set_wake function either so the call will
+fail with -ENOSYS. As a result the irq_set_wake() call in the resume
+path will trigger an 'Unbalanced wake disable' warning.
+
+Before the conversion the GIC irqchip was the top level irqchip and
+correctly flagged with IRQCHIP_SKIP_SET_WAKE.
+
+Restore the correct behaviour by removing the irq_set_type callback
+from the crossbar irqchip and set the IRQCHIP_SKIP_SET_WAKE flag which
+lets the irq_set_irq_wake() call from the driver succeed.
+
+[ tglx: Massaged changelog ]
+
+Fixes: 783d31863fb8 ('irqchip: crossbar: Convert dra7 crossbar...')
+Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
+Cc: Sudeep Holla <sudeep.holla@arm.com>
+Cc: <linux@arm.linux.org.uk>
+Cc: <nsekhar@ti.com>
+Cc: <jason@lakedaemon.net>
+Cc: <balbi@ti.com>
+Cc: <linux-arm-kernel@lists.infradead.org>
+Cc: <tony@atomide.com>
+Cc: <marc.zyngier@arm.com>
+Link: http://lkml.kernel.org/r/1439554830-19502-7-git-send-email-grygorii.strashko@ti.com
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/irqchip/irq-crossbar.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/irqchip/irq-crossbar.c
++++ b/drivers/irqchip/irq-crossbar.c
+@@ -68,9 +68,9 @@ static struct irq_chip crossbar_chip = {
+ .irq_mask = irq_chip_mask_parent,
+ .irq_unmask = irq_chip_unmask_parent,
+ .irq_retrigger = irq_chip_retrigger_hierarchy,
+- .irq_set_wake = irq_chip_set_wake_parent,
+ .irq_set_type = irq_chip_set_type_parent,
+- .flags = IRQCHIP_MASK_ON_SUSPEND,
++ .flags = IRQCHIP_MASK_ON_SUSPEND |
++ IRQCHIP_SKIP_SET_WAKE,
+ #ifdef CONFIG_SMP
+ .irq_set_affinity = irq_chip_set_affinity_parent,
+ #endif
--- /dev/null
+From e269ec42328783e51be08c191aa935dba56141fc Mon Sep 17 00:00:00 2001
+From: Grygorii Strashko <grygorii.strashko@ti.com>
+Date: Fri, 14 Aug 2015 15:20:27 +0300
+Subject: irqchip/crossbar: Restore the irq_set_type() mechanism
+
+From: Grygorii Strashko <grygorii.strashko@ti.com>
+
+commit e269ec42328783e51be08c191aa935dba56141fc upstream.
+
+The conversion of the crossbar irqchip to hierarchical irq domains
+failed to provide a mechanism to properly set the trigger type of an
+interrupt.
+
+The crossbar irq chip itself has no mechanism and therefor no
+irq_set_type() callback. The code before the conversion relayed the
+trigger configuration directly to the underlying GIC.
+
+Restore the correct behaviour by setting the crossbar irq_set_type
+callback to irq_chip_set_type_parent(). This propagates the
+set_trigger() call to the underlying GIC irqchip.
+
+[ tglx: Massaged changelog ]
+
+Fixes: 783d31863fb8 ('irqchip: crossbar: Convert dra7 crossbar...')
+Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
+Cc: Sudeep Holla <sudeep.holla@arm.com>
+Cc: <linux@arm.linux.org.uk>
+Cc: <nsekhar@ti.com>
+Cc: <jason@lakedaemon.net>
+Cc: <balbi@ti.com>
+Cc: <linux-arm-kernel@lists.infradead.org>
+Cc: <tony@atomide.com>
+Cc: <marc.zyngier@arm.com>
+Link: http://lkml.kernel.org/r/1439554830-19502-4-git-send-email-grygorii.strashko@ti.com
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/irqchip/irq-crossbar.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/irqchip/irq-crossbar.c
++++ b/drivers/irqchip/irq-crossbar.c
+@@ -69,6 +69,7 @@ static struct irq_chip crossbar_chip = {
+ .irq_unmask = irq_chip_unmask_parent,
+ .irq_retrigger = irq_chip_retrigger_hierarchy,
+ .irq_set_wake = irq_chip_set_wake_parent,
++ .irq_set_type = irq_chip_set_type_parent,
+ #ifdef CONFIG_SMP
+ .irq_set_affinity = irq_chip_set_affinity_parent,
+ #endif
--- /dev/null
+From 4fd8f47e7e5b64a74b60f23c2e08ba8234d659d1 Mon Sep 17 00:00:00 2001
+From: Grygorii Strashko <grygorii.strashko@ti.com>
+Date: Fri, 14 Aug 2015 15:20:29 +0300
+Subject: irqchip/crossbar: Restore the mask on suspend behaviour
+
+From: Grygorii Strashko <grygorii.strashko@ti.com>
+
+commit 4fd8f47e7e5b64a74b60f23c2e08ba8234d659d1 upstream.
+
+The ARM GIC requires that all interrupts which are not used as a
+wakeup source have to be masked during suspend.
+
+The conversion of the crossbar irqchip to hierarchical irq domains
+failed to mark the crossbar irqchip with the IRQCHIP_MASK_ON_SUSPEND
+flag and therefor broke the suspend requirement of the GIC.
+
+Before the conversion the flags were visible because the GIC was the
+top level irqchip. After the conversion the crossbar irqchip is the
+top level irq chip whose flags are evaluated in suspend_device_irq().
+As the flag is not set the masking of the non-wakeup irqs is not
+invoked which breaks suspend.
+
+Add the IRQCHIP_MASK_ON_SUSPEND flag to the crossbar irqchip, so the
+GIC interrupts get masked properly.
+
+[ tglx: Massaged changelog ]
+
+Fixes: 783d31863fb8 ('irqchip: crossbar: Convert dra7 crossbar...')
+Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
+Cc: Sudeep Holla <sudeep.holla@arm.com>
+Cc: <linux@arm.linux.org.uk>
+Cc: <nsekhar@ti.com>
+Cc: <jason@lakedaemon.net>
+Cc: <balbi@ti.com>
+Cc: <linux-arm-kernel@lists.infradead.org>
+Cc: <tony@atomide.com>
+Cc: <marc.zyngier@arm.com>
+Link: http://lkml.kernel.org/r/1439554830-19502-6-git-send-email-grygorii.strashko@ti.com
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/irqchip/irq-crossbar.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/irqchip/irq-crossbar.c
++++ b/drivers/irqchip/irq-crossbar.c
+@@ -70,6 +70,7 @@ static struct irq_chip crossbar_chip = {
+ .irq_retrigger = irq_chip_retrigger_hierarchy,
+ .irq_set_wake = irq_chip_set_wake_parent,
+ .irq_set_type = irq_chip_set_type_parent,
++ .flags = IRQCHIP_MASK_ON_SUSPEND,
+ #ifdef CONFIG_SMP
+ .irq_set_affinity = irq_chip_set_affinity_parent,
+ #endif
--- /dev/null
+From 49718f0fb8c9af192b33d8af3a2826db04025371 Mon Sep 17 00:00:00 2001
+From: Alan Stern <stern@rowland.harvard.edu>
+Date: Mon, 17 Aug 2015 11:02:42 -0400
+Subject: SCSI: Fix NULL pointer dereference in runtime PM
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Alan Stern <stern@rowland.harvard.edu>
+
+commit 49718f0fb8c9af192b33d8af3a2826db04025371 upstream.
+
+The routines in scsi_rpm.c assume that if a runtime-PM callback is
+invoked for a SCSI device, it can only mean that the device's driver
+has asked the block layer to handle the runtime power management (by
+calling blk_pm_runtime_init(), which among other things sets q->dev).
+
+However, this assumption turns out to be wrong for things like the ses
+driver. Normally ses devices are not allowed to do runtime PM, but
+userspace can override this setting. If this happens, the kernel gets
+a NULL pointer dereference when blk_post_runtime_resume() tries to use
+the uninitialized q->dev pointer.
+
+This patch fixes the problem by calling the block layer's runtime-PM
+routines only if the device's driver really does have a runtime-PM
+callback routine. Since ses doesn't define any such callbacks, the
+crash won't occur.
+
+This fixes Bugzilla #101371.
+
+Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
+Reported-by: Stanisław Pitucha <viraptor@gmail.com>
+Reported-by: Ilan Cohen <ilanco@gmail.com>
+Tested-by: Ilan Cohen <ilanco@gmail.com>
+Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
+Signed-off-by: James Bottomley <JBottomley@Odin.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/scsi/scsi_pm.c | 22 +++++++++++-----------
+ 1 file changed, 11 insertions(+), 11 deletions(-)
+
+--- a/drivers/scsi/scsi_pm.c
++++ b/drivers/scsi/scsi_pm.c
+@@ -217,15 +217,15 @@ static int sdev_runtime_suspend(struct d
+ {
+ const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+ struct scsi_device *sdev = to_scsi_device(dev);
+- int err;
++ int err = 0;
+
+- err = blk_pre_runtime_suspend(sdev->request_queue);
+- if (err)
+- return err;
+- if (pm && pm->runtime_suspend)
++ if (pm && pm->runtime_suspend) {
++ err = blk_pre_runtime_suspend(sdev->request_queue);
++ if (err)
++ return err;
+ err = pm->runtime_suspend(dev);
+- blk_post_runtime_suspend(sdev->request_queue, err);
+-
++ blk_post_runtime_suspend(sdev->request_queue, err);
++ }
+ return err;
+ }
+
+@@ -248,11 +248,11 @@ static int sdev_runtime_resume(struct de
+ const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+ int err = 0;
+
+- blk_pre_runtime_resume(sdev->request_queue);
+- if (pm && pm->runtime_resume)
++ if (pm && pm->runtime_resume) {
++ blk_pre_runtime_resume(sdev->request_queue);
+ err = pm->runtime_resume(dev);
+- blk_post_runtime_resume(sdev->request_queue, err);
+-
++ blk_post_runtime_resume(sdev->request_queue, err);
++ }
+ return err;
+ }
+
target-iscsi-fix-double-free-of-a-tur-followed-by-a-solicited-nopout.patch
pci-don-t-use-64-bit-bus-addresses-on-pa-risc.patch
input-gpio_keys_polled-request-gpio-pin-as-input.patch
+drm-atmel-hlcdc-compile-suspend-resume-for-pm_sleep-only.patch
+drm-i915-flag-the-execlists-context-object-as-dirty-after-every-use.patch
+drm-i915-remove-hbr2-from-chv-supported-list.patch
+drm-i915-avoid-tp3-on-chv.patch
+9p-ensure-err-is-initialized-to-0-in-p9_client_read-write.patch
+irqchip-crossbar-restore-the-irq_set_type-mechanism.patch
+irqchip-crossbar-restore-the-mask-on-suspend-behaviour.patch
+irqchip-crossbar-restore-set_wake-functionality.patch
+arm-omap-wakeupgen-restore-the-irq_set_type-mechanism.patch
+genirq-don-t-return-enosys-in-irq_chip_retrigger_hierarchy.patch
+genirq-introduce-irq_chip_set_type_parent-helper.patch
+scsi-fix-null-pointer-dereference-in-runtime-pm.patch
+can-pcan_usb-don-t-provide-can-fd-bittimings-by-non-fd-adapters.patch
+add-factory-recertified-crucial-m500s-to-blacklist.patch
+fnic-use-the-local-variable-instead-of-i-o-flag-to-acquire-io_req_lock-in-fnic_queuecommand-to-avoid-deadloack.patch
+arm64-kvm-fix-host-crash-when-injecting-a-fault-into-a-32bit-guest.patch
+arm64-perf-fix-unassigned-cpu_pmu-plat_device-when-probing-pmu-ppis.patch
+x86-xen-make-config_xen-depend-on-config_x86_local_apic.patch
+x86-apic-fix-fallout-from-x2apic-cleanup.patch
+x86-idle-restore-trace_cpu_idle-to-mwait_idle-calls.patch
--- /dev/null
+From a57e456a7b28431b55e407e5ab78ebd5b378d19e Mon Sep 17 00:00:00 2001
+From: Thomas Gleixner <tglx@linutronix.de>
+Date: Sat, 22 Aug 2015 16:41:17 +0200
+Subject: x86/apic: Fix fallout from x2apic cleanup
+
+From: Thomas Gleixner <tglx@linutronix.de>
+
+commit a57e456a7b28431b55e407e5ab78ebd5b378d19e upstream.
+
+In the recent x2apic cleanup I got two things really wrong:
+1) The safety check in __disable_x2apic which allows the function to
+ be called unconditionally is backwards. The check is there to
+ prevent access to the apic MSR in case that the machine has no
+ apic. Though right now it returns if the machine has an apic and
+ therefor the disabling of x2apic is never invoked.
+
+2) x2apic_disable() sets x2apic_mode to 0 after registering the local
+ apic. That's wrong, because register_lapic_address() checks x2apic
+ mode and therefor takes the wrong code path.
+
+This results in boot failures on machines with x2apic preenabled by
+BIOS and can also lead to an fatal MSR access on machines without
+apic.
+
+The solutions are simple:
+1) Correct the sanity check for apic availability
+2) Clear x2apic_mode _before_ calling register_lapic_address()
+
+Fixes: 659006bf3ae3 'x86/x2apic: Split enable and setup function'
+Reported-and-tested-by: Javier Monteagudo <javiermon@gmail.com>
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Link: https://bugzilla.redhat.com/show_bug.cgi?id=1224764
+Cc: Laura Abbott <labbott@redhat.com>
+Cc: Jiang Liu <jiang.liu@linux.intel.com>
+Cc: Joerg Roedel <joro@8bytes.org>
+Cc: Tony Luck <tony.luck@intel.com>
+Cc: Borislav Petkov <bp@alien8.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/kernel/apic/apic.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+--- a/arch/x86/kernel/apic/apic.c
++++ b/arch/x86/kernel/apic/apic.c
+@@ -1424,7 +1424,7 @@ static inline void __x2apic_disable(void
+ {
+ u64 msr;
+
+- if (cpu_has_apic)
++ if (!cpu_has_apic)
+ return;
+
+ rdmsrl(MSR_IA32_APICBASE, msr);
+@@ -1483,10 +1483,13 @@ void x2apic_setup(void)
+
+ static __init void x2apic_disable(void)
+ {
+- u32 x2apic_id;
++ u32 x2apic_id, state = x2apic_state;
+
+- if (x2apic_state != X2APIC_ON)
+- goto out;
++ x2apic_mode = 0;
++ x2apic_state = X2APIC_DISABLED;
++
++ if (state != X2APIC_ON)
++ return;
+
+ x2apic_id = read_apic_id();
+ if (x2apic_id >= 255)
+@@ -1494,9 +1497,6 @@ static __init void x2apic_disable(void)
+
+ __x2apic_disable();
+ register_lapic_address(mp_lapic_addr);
+-out:
+- x2apic_state = X2APIC_DISABLED;
+- x2apic_mode = 0;
+ }
+
+ static __init void x2apic_enable(void)
--- /dev/null
+From e43d0189ac02415fe4487f79fc35e8f147e9ea0d Mon Sep 17 00:00:00 2001
+From: Jisheng Zhang <jszhang@marvell.com>
+Date: Thu, 20 Aug 2015 12:54:39 +0800
+Subject: x86/idle: Restore trace_cpu_idle to mwait_idle() calls
+
+From: Jisheng Zhang <jszhang@marvell.com>
+
+commit e43d0189ac02415fe4487f79fc35e8f147e9ea0d upstream.
+
+Commit b253149b843f ("sched/idle/x86: Restore mwait_idle() to fix boot
+hangs, to improve power savings and to improve performance") restores
+mwait_idle(), but the trace_cpu_idle related calls are missing. This
+causes powertop on my old desktop powered by Intel Core2 E6550 to
+report zero wakeups and zero events.
+
+Add them back to restore the proper behaviour.
+
+Fixes: b253149b843f ("sched/idle/x86: Restore mwait_idle() to ...")
+Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
+Cc: <len.brown@intel.com>
+Link: http://lkml.kernel.org/r/1440046479-4262-1-git-send-email-jszhang@marvell.com
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/kernel/process.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/x86/kernel/process.c
++++ b/arch/x86/kernel/process.c
+@@ -453,6 +453,7 @@ static int prefer_mwait_c1_over_halt(con
+ static void mwait_idle(void)
+ {
+ if (!current_set_polling_and_test()) {
++ trace_cpu_idle_rcuidle(1, smp_processor_id());
+ if (this_cpu_has(X86_BUG_CLFLUSH_MONITOR)) {
+ smp_mb(); /* quirk */
+ clflush((void *)¤t_thread_info()->flags);
+@@ -464,6 +465,7 @@ static void mwait_idle(void)
+ __sti_mwait(0, 0);
+ else
+ local_irq_enable();
++ trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
+ } else {
+ local_irq_enable();
+ }
--- /dev/null
+From 87ffd2b9bb74061c120f450e4d0f3409bb603ae0 Mon Sep 17 00:00:00 2001
+From: David Vrabel <david.vrabel@citrix.com>
+Date: Thu, 20 Aug 2015 11:33:41 +0100
+Subject: x86/xen: make CONFIG_XEN depend on CONFIG_X86_LOCAL_APIC
+
+From: David Vrabel <david.vrabel@citrix.com>
+
+commit 87ffd2b9bb74061c120f450e4d0f3409bb603ae0 upstream.
+
+Since commit feb44f1f7a4ac299d1ab1c3606860e70b9b89d69 (x86/xen:
+Provide a "Xen PV" APIC driver to support >255 VCPUs) Xen guests need
+a full APIC driver and thus should depend on X86_LOCAL_APIC.
+
+This fixes an i386 build failure with !SMP && !CONFIG_X86_UP_APIC by
+disabling Xen support in this configuration.
+
+Users needing Xen support in a non-SMP i386 kernel will need to enable
+CONFIG_X86_UP_APIC.
+
+Signed-off-by: David Vrabel <david.vrabel@citrix.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/xen/Kconfig | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/x86/xen/Kconfig
++++ b/arch/x86/xen/Kconfig
+@@ -8,7 +8,7 @@ config XEN
+ select PARAVIRT_CLOCK
+ select XEN_HAVE_PVMMU
+ depends on X86_64 || (X86_32 && X86_PAE)
+- depends on X86_TSC
++ depends on X86_LOCAL_APIC && X86_TSC
+ help
+ This is the Linux Xen port. Enabling this will allow the
+ kernel to boot in a paravirtualized environment under the
+@@ -17,7 +17,7 @@ config XEN
+ config XEN_DOM0
+ def_bool y
+ depends on XEN && PCI_XEN && SWIOTLB_XEN
+- depends on X86_LOCAL_APIC && X86_IO_APIC && ACPI && PCI
++ depends on X86_IO_APIC && ACPI && PCI
+
+ config XEN_PVHVM
+ def_bool y
projects / thirdparty / kernel / stable-queue.git / commitdiff
