re PR target/42881 (SSE2 intrinsics miscompiled at -O0 -march=k8)

	PR target/42881
	* config/i386/i386.c (ix86_expand_vector_init_duplicate):
	Wrap force_reg into a sequence, emit it before user.

testsuite/
	* gcc.target/i386/pr42881.c: New test.

From-SVN: r156320

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 211407f95466aeb51b24fc469e35b5314b445936..7df2ce28de286d10ff2659526ed2904e5361bb41 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2010-01-28  Michael Matz  <matz@suse.de>
+
+       PR target/42881
+       * config/i386/i386.c (ix86_expand_vector_init_duplicate):
+       Wrap force_reg into a sequence, emit it before user.
+
 2010-01-28  Stephen Thomas  <stephen.thomas@arm.com>
 
        * config/arm/arm.md (bswapsi2): Add support for bswapsi2.

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 6b1c9b9c61f5d5d511a5174c2aaa8fd131b7fea6..84b652f2f8129f6fb55257004c049b9ffe4d4934 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -26644,8 +26644,16 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, enum machine_mode mode,
        insn = emit_insn (gen_rtx_SET (VOIDmode, target, dup));
        if (recog_memoized (insn) < 0)
          {
+           rtx seq;
            /* If that fails, force VAL into a register.  */
+
+           start_sequence ();
            XEXP (dup, 0) = force_reg (GET_MODE_INNER (mode), val);
+           seq = get_insns ();
+           end_sequence ();
+           if (seq)
+             emit_insn_before (seq, insn);
+
            ok = recog_memoized (insn) >= 0;
            gcc_assert (ok);
          }

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0d459115c18cf3a74a1a266c22e6864ec8cb3d11..675c6c5f6035a44188d2d1de0530a842b9695738 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2010-01-28  Michael Matz  <matz@suse.de>
+
+       * gcc.target/i386/pr42881.c: New test.
+
 2010-01-28  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 
        * gcc.misc-tests/linkage.exp: Remove mips-sgi-irix6*o32 support.
@@ -12,7 +16,7 @@
 
 2010-01-27  Stephen Thomas  <stephen.thomas@arm.com>
 
-        * testsuite/gcc.dg/optimize-bswap*.c: Add ARM target
+       * testsuite/gcc.dg/optimize-bswap*.c: Add ARM target
 
 2010-01-27  Richard Guenther  <rguenther@suse.de>
 

diff --git a/gcc/testsuite/gcc.target/i386/pr42881.c b/gcc/testsuite/gcc.target/i386/pr42881.c
new file mode 100644 (file)
index 0000000..8c1f571
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr42881.c
@@ -0,0 +1,14 @@
+/* PR target/42881 */
+/* { dg-do run } */
+/* { dg-options "-O0 -msse" } */
+#include "sse-check.h"
+#include <xmmintrin.h>
+static void
+sse_test (void)
+{
+  double a[2];
+  __m128d x = _mm_set1_pd(3);
+  _mm_storeu_pd(a,x);
+  if (a[0] != 3.0 || a[1] != 3.0)
+    __builtin_abort ();
+}