]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/xe/huc: Convert register access to use xe_mmio
authorMatt Roper <matthew.d.roper@intel.com>
Tue, 10 Sep 2024 23:47:42 +0000 (16:47 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Wed, 11 Sep 2024 22:32:50 +0000 (15:32 -0700)
Stop using GT pointers for register access.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240910234719.3335472-67-matthew.d.roper@intel.com
drivers/gpu/drm/xe/xe_huc.c

index f5459f97af23f70bfe298a3af349af826ebaafa5..77c5830309cff87029b3dcae81fc8005bb2ddb04 100644 (file)
@@ -229,7 +229,7 @@ bool xe_huc_is_authenticated(struct xe_huc *huc, enum xe_huc_auth_types type)
 {
        struct xe_gt *gt = huc_to_gt(huc);
 
-       return xe_mmio_read32(gt, huc_auth_modes[type].reg) & huc_auth_modes[type].val;
+       return xe_mmio_read32(&gt->mmio, huc_auth_modes[type].reg) & huc_auth_modes[type].val;
 }
 
 int xe_huc_auth(struct xe_huc *huc, enum xe_huc_auth_types type)
@@ -268,7 +268,7 @@ int xe_huc_auth(struct xe_huc *huc, enum xe_huc_auth_types type)
                goto fail;
        }
 
-       ret = xe_mmio_wait32(gt, huc_auth_modes[type].reg, huc_auth_modes[type].val,
+       ret = xe_mmio_wait32(&gt->mmio, huc_auth_modes[type].reg, huc_auth_modes[type].val,
                             huc_auth_modes[type].val, 100000, NULL, false);
        if (ret) {
                xe_gt_err(gt, "HuC: firmware not verified: %pe\n", ERR_PTR(ret));
@@ -308,7 +308,7 @@ void xe_huc_print_info(struct xe_huc *huc, struct drm_printer *p)
                return;
 
        drm_printf(p, "\nHuC status: 0x%08x\n",
-                  xe_mmio_read32(gt, HUC_KERNEL_LOAD_INFO));
+                  xe_mmio_read32(&gt->mmio, HUC_KERNEL_LOAD_INFO));
 
        xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
 }