--- /dev/null
+From c4c6f2cad9e1d4cc076bc183c3689cc9e7019c75 Mon Sep 17 00:00:00 2001
+From: James Hogan <james.hogan@imgtec.com>
+Date: Wed, 4 Feb 2015 10:52:03 +0000
+Subject: KVM: MIPS: Disable HTW while in guest
+
+From: James Hogan <james.hogan@imgtec.com>
+
+commit c4c6f2cad9e1d4cc076bc183c3689cc9e7019c75 upstream.
+
+Ensure any hardware page table walker (HTW) is disabled while in KVM
+guest mode, as KVM doesn't yet set up hardware page table walking for
+guest mappings so the wrong mappings would get loaded, resulting in the
+guest hanging or crashing once it reaches userland.
+
+The HTW is disabled and re-enabled around the call to
+__kvm_mips_vcpu_run() which does the initial switch into guest mode and
+the final switch out of guest context. Additionally it is enabled for
+the duration of guest exits (i.e. kvm_mips_handle_exit()), getting
+disabled again before returning back to guest or host.
+
+In all cases the HTW is only disabled in normal kernel mode while
+interrupts are disabled, so that the HTW doesn't get left disabled if
+the process is preempted.
+
+Signed-off-by: James Hogan <james.hogan@imgtec.com>
+Cc: Paolo Bonzini <pbonzini@redhat.com>
+Cc: Ralf Baechle <ralf@linux-mips.org>
+Cc: Markos Chandras <markos.chandras@imgtec.com>
+Cc: Gleb Natapov <gleb@kernel.org>
+Cc: kvm@vger.kernel.org
+Cc: linux-mips@linux-mips.org
+Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/mips/kvm/mips.c | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/arch/mips/kvm/mips.c
++++ b/arch/mips/kvm/mips.c
+@@ -18,6 +18,7 @@
+ #include <asm/page.h>
+ #include <asm/cacheflush.h>
+ #include <asm/mmu_context.h>
++#include <asm/pgtable.h>
+
+ #include <linux/kvm_host.h>
+
+@@ -385,8 +386,14 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_v
+
+ kvm_guest_enter();
+
++ /* Disable hardware page table walking while in guest */
++ htw_stop();
++
+ r = __kvm_mips_vcpu_run(run, vcpu);
+
++ /* Re-enable HTW before enabling interrupts */
++ htw_start();
++
+ kvm_guest_exit();
+ local_irq_enable();
+
+@@ -1002,6 +1009,9 @@ int kvm_mips_handle_exit(struct kvm_run
+ enum emulation_result er = EMULATE_DONE;
+ int ret = RESUME_GUEST;
+
++ /* re-enable HTW before enabling interrupts */
++ htw_start();
++
+ /* Set a default exit reason */
+ run->exit_reason = KVM_EXIT_UNKNOWN;
+ run->ready_for_interrupt_injection = 1;
+@@ -1136,6 +1146,9 @@ skip_emul:
+ }
+ }
+
++ /* Disable HTW before returning to guest or host */
++ htw_stop();
++
+ return ret;
+ }
+
--- /dev/null
+From f798217dfd038af981a18bbe4bc57027a08bb182 Mon Sep 17 00:00:00 2001
+From: James Hogan <james.hogan@imgtec.com>
+Date: Wed, 4 Feb 2015 17:06:37 +0000
+Subject: KVM: MIPS: Don't leak FPU/DSP to guest
+
+From: James Hogan <james.hogan@imgtec.com>
+
+commit f798217dfd038af981a18bbe4bc57027a08bb182 upstream.
+
+The FPU and DSP are enabled via the CP0 Status CU1 and MX bits by
+kvm_mips_set_c0_status() on a guest exit, presumably in case there is
+active state that needs saving if pre-emption occurs. However neither of
+these bits are cleared again when returning to the guest.
+
+This effectively gives the guest access to the FPU/DSP hardware after
+the first guest exit even though it is not aware of its presence,
+allowing FP instructions in guest user code to intermittently actually
+execute instead of trapping into the guest OS for emulation. It will
+then read & manipulate the hardware FP registers which technically
+belong to the user process (e.g. QEMU), or are stale from another user
+process. It can also crash the guest OS by causing an FP exception, for
+which a guest exception handler won't have been registered.
+
+First lets save and disable the FPU (and MSA) state with lose_fpu(1)
+before entering the guest. This simplifies the problem, especially for
+when guest FPU/MSA support is added in the future, and prevents FR=1 FPU
+state being live when the FR bit gets cleared for the guest, which
+according to the architecture causes the contents of the FPU and vector
+registers to become UNPREDICTABLE.
+
+We can then safely remove the enabling of the FPU in
+kvm_mips_set_c0_status(), since there should never be any active FPU or
+MSA state to save at pre-emption, which should plug the FPU leak.
+
+DSP state is always live rather than being lazily restored, so for that
+it is simpler to just clear the MX bit again when re-entering the guest.
+
+Signed-off-by: James Hogan <james.hogan@imgtec.com>
+Cc: Paolo Bonzini <pbonzini@redhat.com>
+Cc: Ralf Baechle <ralf@linux-mips.org>
+Cc: Sanjay Lal <sanjayl@kymasys.com>
+Cc: Gleb Natapov <gleb@kernel.org>
+Cc: kvm@vger.kernel.org
+Cc: linux-mips@linux-mips.org
+Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/mips/kvm/locore.S | 2 +-
+ arch/mips/kvm/mips.c | 6 +++---
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+--- a/arch/mips/kvm/locore.S
++++ b/arch/mips/kvm/locore.S
+@@ -434,7 +434,7 @@ __kvm_mips_return_to_guest:
+ /* Setup status register for running guest in UM */
+ .set at
+ or v1, v1, (ST0_EXL | KSU_USER | ST0_IE)
+- and v1, v1, ~ST0_CU0
++ and v1, v1, ~(ST0_CU0 | ST0_MX)
+ .set noat
+ mtc0 v1, CP0_STATUS
+ ehb
+--- a/arch/mips/kvm/mips.c
++++ b/arch/mips/kvm/mips.c
+@@ -15,6 +15,7 @@
+ #include <linux/vmalloc.h>
+ #include <linux/fs.h>
+ #include <linux/bootmem.h>
++#include <asm/fpu.h>
+ #include <asm/page.h>
+ #include <asm/cacheflush.h>
+ #include <asm/mmu_context.h>
+@@ -379,6 +380,8 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_v
+ vcpu->mmio_needed = 0;
+ }
+
++ lose_fpu(1);
++
+ local_irq_disable();
+ /* Check if we have any exceptions/interrupts pending */
+ kvm_mips_deliver_interrupts(vcpu,
+@@ -987,9 +990,6 @@ static void kvm_mips_set_c0_status(void)
+ {
+ uint32_t status = read_c0_status();
+
+- if (cpu_has_fpu)
+- status |= (ST0_CU1);
+-
+ if (cpu_has_dsp)
+ status |= (ST0_MX);
+
--- /dev/null
+From a39128bcd6f1e56c6514abf489b40b67d226093b Mon Sep 17 00:00:00 2001
+From: Marcin Wojtas <mw@semihalf.com>
+Date: Thu, 29 Jan 2015 12:36:25 +0100
+Subject: mmc: sdhci-pxav3: Fix Armada 38x controller's caps according to erratum ERR-7878951
+
+From: Marcin Wojtas <mw@semihalf.com>
+
+commit a39128bcd6f1e56c6514abf489b40b67d226093b upstream.
+
+According to erratum 'ERR-7878951' Armada 38x SDHCI controller has
+different capabilities than the ones shown in its registers:
+
+- it doesn't support the voltage switching: it can work either with
+ 3.3V or 1.8V supply
+- it doesn't support the SDR104 mode
+- SDR50 mode doesn't need tuning
+
+The SDHCI_QUIRK_MISSING_CAPS quirk is used for updating the
+capabilities accordingly.
+
+[gregory.clement@free-electrons.com: port from 3.10]
+
+Fixes: 5491ce3f79ee ("mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller")
+
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-pxav3.c | 28 +++++++++++++++++++++++-----
+ 1 file changed, 23 insertions(+), 5 deletions(-)
+
+--- a/drivers/mmc/host/sdhci-pxav3.c
++++ b/drivers/mmc/host/sdhci-pxav3.c
+@@ -118,8 +118,11 @@ static int mv_conf_mbus_windows(struct p
+ return 0;
+ }
+
+-static int armada_38x_quirks(struct sdhci_host *host)
++static int armada_38x_quirks(struct platform_device *pdev,
++ struct sdhci_host *host)
+ {
++ struct device_node *np = pdev->dev.of_node;
++
+ host->quirks |= SDHCI_QUIRK_MISSING_CAPS;
+ /*
+ * According to erratum 'FE-2946959' both SDR50 and DDR50
+@@ -129,6 +132,21 @@ static int armada_38x_quirks(struct sdhc
+ */
+ host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
+ host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_DDR50);
++
++ /*
++ * According to erratum 'ERR-7878951' Armada 38x SDHCI
++ * controller has different capabilities than the ones shown
++ * in its registers
++ */
++ host->caps = sdhci_readl(host, SDHCI_CAPABILITIES);
++ if (of_property_read_bool(np, "no-1-8-v")) {
++ host->caps &= ~SDHCI_CAN_VDD_180;
++ host->mmc->caps &= ~MMC_CAP_1_8V_DDR;
++ } else {
++ host->caps &= ~SDHCI_CAN_VDD_330;
++ }
++ host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_USE_SDR50_TUNING);
++
+ return 0;
+ }
+
+@@ -332,8 +350,11 @@ static int sdhci_pxav3_probe(struct plat
+ if (!IS_ERR(pxa->clk_core))
+ clk_prepare_enable(pxa->clk_core);
+
++ /* enable 1/8V DDR capable */
++ host->mmc->caps |= MMC_CAP_1_8V_DDR;
++
+ if (of_device_is_compatible(np, "marvell,armada-380-sdhci")) {
+- ret = armada_38x_quirks(host);
++ ret = armada_38x_quirks(pdev, host);
+ if (ret < 0)
+ goto err_clk_get;
+ ret = mv_conf_mbus_windows(pdev, mv_mbus_dram_info());
+@@ -341,9 +362,6 @@ static int sdhci_pxav3_probe(struct plat
+ goto err_mbus_win;
+ }
+
+- /* enable 1/8V DDR capable */
+- host->mmc->caps |= MMC_CAP_1_8V_DDR;
+-
+ match = of_match_device(of_match_ptr(sdhci_pxav3_of_match), &pdev->dev);
+ if (match) {
+ ret = mmc_of_parse(host->mmc);
--- /dev/null
+From 3bb10f60933e84abfe2be69f60b3486f9b96348b Mon Sep 17 00:00:00 2001
+From: Jisheng Zhang <jszhang@marvell.com>
+Date: Fri, 23 Jan 2015 18:08:21 +0800
+Subject: mmc: sdhci-pxav3: fix race between runtime pm and irq
+
+From: Jisheng Zhang <jszhang@marvell.com>
+
+commit 3bb10f60933e84abfe2be69f60b3486f9b96348b upstream.
+
+This patch is to fix a race condition that may cause an unhandled irq,
+which results in big sdhci interrupt numbers and endless "mmc1: got irq
+while runtime suspended" msgs before v3.15.
+
+Consider following scenario:
+
+ CPU0 CPU1
+ sdhci_pxav3_runtime_suspend()
+ spin_lock_irqsave(&host->lock, flags);
+ sdhci_irq()
+ spining on the &host->lock
+ host->runtime_suspended = true;
+ spin_unlock_irqrestore(&host->lock, flags);
+ get the &host->lock
+ runtime_suspended is true now
+ return IRQ_NONE;
+
+Fix this race by using the core sdhci.c supplied sdhci_runtime_suspend_host()
+in runtime suspend hook which will disable card interrupts. We also use the
+sdhci_runtime_resume_host() in the runtime resume hook accordingly.
+
+Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-pxav3.c | 15 +++++----------
+ 1 file changed, 5 insertions(+), 10 deletions(-)
+
+--- a/drivers/mmc/host/sdhci-pxav3.c
++++ b/drivers/mmc/host/sdhci-pxav3.c
+@@ -458,11 +458,11 @@ static int sdhci_pxav3_runtime_suspend(s
+ struct sdhci_host *host = dev_get_drvdata(dev);
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct sdhci_pxa *pxa = pltfm_host->priv;
+- unsigned long flags;
++ int ret;
+
+- spin_lock_irqsave(&host->lock, flags);
+- host->runtime_suspended = true;
+- spin_unlock_irqrestore(&host->lock, flags);
++ ret = sdhci_runtime_suspend_host(host);
++ if (ret)
++ return ret;
+
+ clk_disable_unprepare(pxa->clk_io);
+ if (!IS_ERR(pxa->clk_core))
+@@ -476,17 +476,12 @@ static int sdhci_pxav3_runtime_resume(st
+ struct sdhci_host *host = dev_get_drvdata(dev);
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct sdhci_pxa *pxa = pltfm_host->priv;
+- unsigned long flags;
+
+ clk_prepare_enable(pxa->clk_io);
+ if (!IS_ERR(pxa->clk_core))
+ clk_prepare_enable(pxa->clk_core);
+
+- spin_lock_irqsave(&host->lock, flags);
+- host->runtime_suspended = false;
+- spin_unlock_irqrestore(&host->lock, flags);
+-
+- return 0;
++ return sdhci_runtime_resume_host(host);
+ }
+ #endif
+
--- /dev/null
+From d4b803c559843e3774736e5108cf6331cf75f64c Mon Sep 17 00:00:00 2001
+From: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Date: Thu, 29 Jan 2015 12:36:24 +0100
+Subject: mmc: sdhci-pxav3: Fix SDR50 and DDR50 capabilities for the Armada 38x flavor
+
+From: Gregory CLEMENT <gregory.clement@free-electrons.com>
+
+commit d4b803c559843e3774736e5108cf6331cf75f64c upstream.
+
+According to erratum 'FE-2946959' both SDR50 and DDR50 modes require
+specific clock adjustments in SDIO3 Configuration register. However,
+this register was not part of the device tree binding. Even if the
+binding can (and will) be extended we still need handling the case
+where this register was not available. In this case we use the
+SDHCI_QUIRK_MISSING_CAPS quirk remove them from the capabilities.
+
+This commit is based on the work done by Marcin Wojtas<mw@semihalf.com>
+
+Fixes: 5491ce3f79ee ("mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller")
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Signed-off-by: Marcin Wojtas <mw@semihalf.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-pxav3.c | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+
+--- a/drivers/mmc/host/sdhci-pxav3.c
++++ b/drivers/mmc/host/sdhci-pxav3.c
+@@ -118,6 +118,20 @@ static int mv_conf_mbus_windows(struct p
+ return 0;
+ }
+
++static int armada_38x_quirks(struct sdhci_host *host)
++{
++ host->quirks |= SDHCI_QUIRK_MISSING_CAPS;
++ /*
++ * According to erratum 'FE-2946959' both SDR50 and DDR50
++ * modes require specific clock adjustments in SDIO3
++ * Configuration register, if the adjustment is not done,
++ * remove them from the capabilities.
++ */
++ host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
++ host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_DDR50);
++ return 0;
++}
++
+ static void pxav3_reset(struct sdhci_host *host, u8 mask)
+ {
+ struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc));
+@@ -319,6 +333,9 @@ static int sdhci_pxav3_probe(struct plat
+ clk_prepare_enable(pxa->clk_core);
+
+ if (of_device_is_compatible(np, "marvell,armada-380-sdhci")) {
++ ret = armada_38x_quirks(host);
++ if (ret < 0)
++ goto err_clk_get;
+ ret = mv_conf_mbus_windows(pdev, mv_mbus_dram_info());
+ if (ret < 0)
+ goto err_mbus_win;
--- /dev/null
+From 14460dbaf7a5a0488963fdb8232ad5c8a8cca7b7 Mon Sep 17 00:00:00 2001
+From: Jisheng Zhang <jszhang@marvell.com>
+Date: Wed, 28 Jan 2015 19:54:12 +0800
+Subject: mmc: sdhci-pxav3: fix setting of pdata->clk_delay_cycles
+
+From: Jisheng Zhang <jszhang@marvell.com>
+
+commit 14460dbaf7a5a0488963fdb8232ad5c8a8cca7b7 upstream.
+
+Current code checks "clk_delay_cycles > 0" to know whether the optional
+"mrvl,clk_delay_cycles" is set or not. But of_property_read_u32() doesn't
+touch clk_delay_cycles if the property is not set. And type of
+clk_delay_cycles is u32, so we may always set pdata->clk_delay_cycles as a
+random value.
+
+This patch fix this problem by check the return value of of_property_read_u32()
+to know whether the optional clk-delay-cycles is set or not.
+
+Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-pxav3.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/mmc/host/sdhci-pxav3.c
++++ b/drivers/mmc/host/sdhci-pxav3.c
+@@ -268,8 +268,8 @@ static struct sdhci_pxa_platdata *pxav3_
+ if (!pdata)
+ return NULL;
+
+- of_property_read_u32(np, "mrvl,clk-delay-cycles", &clk_delay_cycles);
+- if (clk_delay_cycles > 0)
++ if (!of_property_read_u32(np, "mrvl,clk-delay-cycles",
++ &clk_delay_cycles))
+ pdata->clk_delay_cycles = clk_delay_cycles;
+
+ return pdata;
--- /dev/null
+From 62cf983ad84275f8580c807e5e596216c46773cf Mon Sep 17 00:00:00 2001
+From: Jisheng Zhang <jszhang@marvell.com>
+Date: Sun, 4 Jan 2015 23:15:47 +0800
+Subject: mmc: sdhci-pxav3: fix unbalanced clock issues during probe
+
+From: Jisheng Zhang <jszhang@marvell.com>
+
+commit 62cf983ad84275f8580c807e5e596216c46773cf upstream.
+
+Commit 0dcaa2499b7d ("sdhci-pxav3: Fix runtime PM initialization") tries
+to fix one hang issue caused by calling sdhci_add_host() on a suspended
+device. The fix enables the clock twice, once by clk_prepare_enable() and
+another by pm_runtime_get_sync(), meaning that the clock will never be
+gated at runtime PM suspend. I observed the power consumption regression on
+Marvell BG2Q SoCs.
+
+In fact, the fix is not correct. There still be a very small window
+during which a runtime suspend might somehow occur after pm_runtime_enable()
+but before pm_runtime_get_sync().
+
+This patch fixes all of the two problems by just incrementing the usage
+counter before pm_runtime_enable(). It also adjust the order of disabling
+runtime pm and storing the usage count in the error path to handle clock
+gating properly.
+
+Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-pxav3.c | 7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+--- a/drivers/mmc/host/sdhci-pxav3.c
++++ b/drivers/mmc/host/sdhci-pxav3.c
+@@ -365,10 +365,11 @@ static int sdhci_pxav3_probe(struct plat
+ }
+ }
+
+- pm_runtime_enable(&pdev->dev);
+- pm_runtime_get_sync(&pdev->dev);
++ pm_runtime_get_noresume(&pdev->dev);
++ pm_runtime_set_active(&pdev->dev);
+ pm_runtime_set_autosuspend_delay(&pdev->dev, PXAV3_RPM_DELAY_MS);
+ pm_runtime_use_autosuspend(&pdev->dev);
++ pm_runtime_enable(&pdev->dev);
+ pm_suspend_ignore_children(&pdev->dev, 1);
+
+ ret = sdhci_add_host(host);
+@@ -391,8 +392,8 @@ static int sdhci_pxav3_probe(struct plat
+ return 0;
+
+ err_add_host:
+- pm_runtime_put_sync(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
++ pm_runtime_put_noidle(&pdev->dev);
+ err_of_parse:
+ err_cd_req:
+ err_mbus_win:
--- /dev/null
+From 6ffa30d3f734d4f6b478081dfc09592021028f90 Mon Sep 17 00:00:00 2001
+From: Jeff Layton <jlayton@primarydata.com>
+Date: Wed, 14 Jan 2015 13:08:57 -0500
+Subject: nfs: don't call blocking operations while !TASK_RUNNING
+
+From: Jeff Layton <jlayton@primarydata.com>
+
+commit 6ffa30d3f734d4f6b478081dfc09592021028f90 upstream.
+
+Bruce reported seeing this warning pop when mounting using v4.1:
+
+ ------------[ cut here ]------------
+ WARNING: CPU: 1 PID: 1121 at kernel/sched/core.c:7300 __might_sleep+0xbd/0xd0()
+ do not call blocking ops when !TASK_RUNNING; state=1 set at [<ffffffff810ff58f>] prepare_to_wait+0x2f/0x90
+ Modules linked in: rpcsec_gss_krb5 auth_rpcgss nfsv4 dns_resolver nfs lockd grace sunrpc fscache ip6t_rpfilter ip6t_REJECT nf_reject_ipv6 xt_conntrack ebtable_nat ebtable_broute bridge stp llc ebtable_filter ebtables ip6table_nat nf_conntrack_ipv6 nf_defrag_ipv6 nf_nat_ipv6 ip6table_mangle ip6table_security ip6table_raw ip6table_filter ip6_tables iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 nf_nat nf_conntrack iptable_mangle iptable_security iptable_raw snd_hda_codec_generic snd_hda_intel snd_hda_controller snd_hda_codec snd_hwdep snd_pcm snd_timer ppdev joydev snd virtio_console virtio_balloon pcspkr serio_raw parport_pc parport pvpanic floppy soundcore i2c_piix4 virtio_blk virtio_net qxl drm_kms_helper ttm drm virtio_pci virtio_ring ata_generic virtio pata_acpi
+ CPU: 1 PID: 1121 Comm: nfsv4.1-svc Not tainted 3.19.0-rc4+ #25
+ Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.7.5-20140709_153950- 04/01/2014
+ 0000000000000000 000000004e5e3f73 ffff8800b998fb48 ffffffff8186ac78
+ 0000000000000000 ffff8800b998fba0 ffff8800b998fb88 ffffffff810ac9da
+ ffff8800b998fb68 ffffffff81c923e7 00000000000004d9 0000000000000000
+ Call Trace:
+ [<ffffffff8186ac78>] dump_stack+0x4c/0x65
+ [<ffffffff810ac9da>] warn_slowpath_common+0x8a/0xc0
+ [<ffffffff810aca65>] warn_slowpath_fmt+0x55/0x70
+ [<ffffffff810ff58f>] ? prepare_to_wait+0x2f/0x90
+ [<ffffffff810ff58f>] ? prepare_to_wait+0x2f/0x90
+ [<ffffffff810dd2ad>] __might_sleep+0xbd/0xd0
+ [<ffffffff8124c973>] kmem_cache_alloc_trace+0x243/0x430
+ [<ffffffff810d941e>] ? groups_alloc+0x3e/0x130
+ [<ffffffff810d941e>] groups_alloc+0x3e/0x130
+ [<ffffffffa0301b1e>] svcauth_unix_accept+0x16e/0x290 [sunrpc]
+ [<ffffffffa0300571>] svc_authenticate+0xe1/0xf0 [sunrpc]
+ [<ffffffffa02fc564>] svc_process_common+0x244/0x6a0 [sunrpc]
+ [<ffffffffa02fd044>] bc_svc_process+0x1c4/0x260 [sunrpc]
+ [<ffffffffa03d5478>] nfs41_callback_svc+0x128/0x1f0 [nfsv4]
+ [<ffffffff810ff970>] ? wait_woken+0xc0/0xc0
+ [<ffffffffa03d5350>] ? nfs4_callback_svc+0x60/0x60 [nfsv4]
+ [<ffffffff810d45bf>] kthread+0x11f/0x140
+ [<ffffffff810ea815>] ? local_clock+0x15/0x30
+ [<ffffffff810d44a0>] ? kthread_create_on_node+0x250/0x250
+ [<ffffffff81874bfc>] ret_from_fork+0x7c/0xb0
+ [<ffffffff810d44a0>] ? kthread_create_on_node+0x250/0x250
+ ---[ end trace 675220a11e30f4f2 ]---
+
+nfs41_callback_svc does most of its work while in TASK_INTERRUPTIBLE,
+which is just wrong. Fix that by finishing the wait immediately if we've
+found that the list has something on it.
+
+Also, we don't expect this kthread to accept signals, so we should be
+using a TASK_UNINTERRUPTIBLE sleep instead. That however, opens us up
+hung task warnings from the watchdog, so have the schedule_timeout
+wake up every 60s if there's no callback activity.
+
+Reported-by: "J. Bruce Fields" <bfields@fieldses.org>
+Signed-off-by: Jeff Layton <jlayton@primarydata.com>
+Signed-off-by: Trond Myklebust <trond.myklebust@primarydata.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ fs/nfs/callback.c | 8 +++++---
+ 1 file changed, 5 insertions(+), 3 deletions(-)
+
+--- a/fs/nfs/callback.c
++++ b/fs/nfs/callback.c
+@@ -128,22 +128,24 @@ nfs41_callback_svc(void *vrqstp)
+ if (try_to_freeze())
+ continue;
+
+- prepare_to_wait(&serv->sv_cb_waitq, &wq, TASK_INTERRUPTIBLE);
++ prepare_to_wait(&serv->sv_cb_waitq, &wq, TASK_UNINTERRUPTIBLE);
+ spin_lock_bh(&serv->sv_cb_lock);
+ if (!list_empty(&serv->sv_cb_list)) {
+ req = list_first_entry(&serv->sv_cb_list,
+ struct rpc_rqst, rq_bc_list);
+ list_del(&req->rq_bc_list);
+ spin_unlock_bh(&serv->sv_cb_lock);
++ finish_wait(&serv->sv_cb_waitq, &wq);
+ dprintk("Invoking bc_svc_process()\n");
+ error = bc_svc_process(serv, req, rqstp);
+ dprintk("bc_svc_process() returned w/ error code= %d\n",
+ error);
+ } else {
+ spin_unlock_bh(&serv->sv_cb_lock);
+- schedule();
++ /* schedule_timeout to game the hung task watchdog */
++ schedule_timeout(60 * HZ);
++ finish_wait(&serv->sv_cb_waitq, &wq);
+ }
+- finish_wait(&serv->sv_cb_waitq, &wq);
+ }
+ return 0;
+ }
--- /dev/null
+From f4086a3d789dbe18949862276d83b8f49fce6d2f Mon Sep 17 00:00:00 2001
+From: Trond Myklebust <trond.myklebust@primarydata.com>
+Date: Fri, 13 Feb 2015 21:03:16 -0500
+Subject: NFS: struct nfs_commit_info.lock must always point to inode->i_lock
+
+From: Trond Myklebust <trond.myklebust@primarydata.com>
+
+commit f4086a3d789dbe18949862276d83b8f49fce6d2f upstream.
+
+Commit 411a99adffb4f (nfs: clear_request_commit while holding i_lock)
+assumes that the nfs_commit_info always points to the inode->i_lock.
+For historical reasons, that is not the case for O_DIRECT writes.
+
+Cc: Weston Andros Adamson <dros@primarydata.com>
+Fixes: 411a99adffb4f ("nfs: clear_request_commit while holding i_lock")
+Signed-off-by: Trond Myklebust <trond.myklebust@primarydata.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ fs/nfs/direct.c | 2 +-
+ include/linux/nfs_xdr.h | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/fs/nfs/direct.c
++++ b/fs/nfs/direct.c
+@@ -242,7 +242,7 @@ static void nfs_direct_release_pages(str
+ void nfs_init_cinfo_from_dreq(struct nfs_commit_info *cinfo,
+ struct nfs_direct_req *dreq)
+ {
+- cinfo->lock = &dreq->lock;
++ cinfo->lock = &dreq->inode->i_lock;
+ cinfo->mds = &dreq->mds_cinfo;
+ cinfo->ds = &dreq->ds_cinfo;
+ cinfo->dreq = dreq;
+--- a/include/linux/nfs_xdr.h
++++ b/include/linux/nfs_xdr.h
+@@ -1342,7 +1342,7 @@ struct nfs_commit_completion_ops {
+ };
+
+ struct nfs_commit_info {
+- spinlock_t *lock;
++ spinlock_t *lock; /* inode->i_lock */
+ struct nfs_mds_commit_info *mds;
+ struct pnfs_ds_commit_info *ds;
+ struct nfs_direct_req *dreq; /* O_DIRECT request */
--- /dev/null
+From 05fbf357d94152171bc50f8a369390f1f16efd89 Mon Sep 17 00:00:00 2001
+From: Konstantin Khlebnikov <khlebnikov@yandex-team.ru>
+Date: Wed, 11 Feb 2015 15:27:31 -0800
+Subject: proc/pagemap: walk page tables under pte lock
+
+From: Konstantin Khlebnikov <khlebnikov@yandex-team.ru>
+
+commit 05fbf357d94152171bc50f8a369390f1f16efd89 upstream.
+
+Lockless access to pte in pagemap_pte_range() might race with page
+migration and trigger BUG_ON(!PageLocked()) in migration_entry_to_page():
+
+CPU A (pagemap) CPU B (migration)
+ lock_page()
+ try_to_unmap(page, TTU_MIGRATION...)
+ make_migration_entry()
+ set_pte_at()
+<read *pte>
+pte_to_pagemap_entry()
+ remove_migration_ptes()
+ unlock_page()
+ if(is_migration_entry())
+ migration_entry_to_page()
+ BUG_ON(!PageLocked(page))
+
+Also lockless read might be non-atomic if pte is larger than wordsize.
+Other pte walkers (smaps, numa_maps, clear_refs) already lock ptes.
+
+Fixes: 052fb0d635df ("proc: report file/anon bit in /proc/pid/pagemap")
+Signed-off-by: Konstantin Khlebnikov <khlebnikov@yandex-team.ru>
+Reported-by: Andrey Ryabinin <a.ryabinin@samsung.com>
+Reviewed-by: Cyrill Gorcunov <gorcunov@openvz.org>
+Acked-by: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com>
+Acked-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
+Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ fs/proc/task_mmu.c | 14 +++++++++-----
+ 1 file changed, 9 insertions(+), 5 deletions(-)
+
+--- a/fs/proc/task_mmu.c
++++ b/fs/proc/task_mmu.c
+@@ -1069,7 +1069,7 @@ static int pagemap_pte_range(pmd_t *pmd,
+ struct vm_area_struct *vma;
+ struct pagemapread *pm = walk->private;
+ spinlock_t *ptl;
+- pte_t *pte;
++ pte_t *pte, *orig_pte;
+ int err = 0;
+
+ /* find the first VMA at or above 'addr' */
+@@ -1130,15 +1130,19 @@ static int pagemap_pte_range(pmd_t *pmd,
+ BUG_ON(is_vm_hugetlb_page(vma));
+
+ /* Addresses in the VMA. */
+- for (; addr < min(end, vma->vm_end); addr += PAGE_SIZE) {
++ orig_pte = pte = pte_offset_map_lock(walk->mm, pmd, addr, &ptl);
++ for (; addr < min(end, vma->vm_end); pte++, addr += PAGE_SIZE) {
+ pagemap_entry_t pme;
+- pte = pte_offset_map(pmd, addr);
++
+ pte_to_pagemap_entry(&pme, pm, vma, addr, *pte);
+- pte_unmap(pte);
+ err = add_to_pagemap(addr, &pme, pm);
+ if (err)
+- return err;
++ break;
+ }
++ pte_unmap_unlock(orig_pte, ptl);
++
++ if (err)
++ return err;
+
+ if (addr == end)
+ break;
em28xx-video-fix-missing-newlines.patch
em28xx-dvb-fix-missing-newlines.patch
em28xx-audio-fix-missing-newlines-again.patch
+mmc-sdhci-pxav3-fix-unbalanced-clock-issues-during-probe.patch
+mmc-sdhci-pxav3-fix-race-between-runtime-pm-and-irq.patch
+mmc-sdhci-pxav3-fix-setting-of-pdata-clk_delay_cycles.patch
+mmc-sdhci-pxav3-fix-sdr50-and-ddr50-capabilities-for-the-armada-38x-flavor.patch
+mmc-sdhci-pxav3-fix-armada-38x-controller-s-caps-according-to-erratum-err-7878951.patch
+proc-pagemap-walk-page-tables-under-pte-lock.patch
+nfs-don-t-call-blocking-operations-while-task_running.patch
+nfs-struct-nfs_commit_info.lock-must-always-point-to-inode-i_lock.patch
+kvm-mips-disable-htw-while-in-guest.patch
+kvm-mips-don-t-leak-fpu-dsp-to-guest.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
