arm64: dts: qcom: sc8180x: Fix LLCC reg property again

Commit '74cf6675c35e ("arm64: dts: qcom: sc8180x: Fix LLCC reg
property")' transitioned the SC8180X LLCC node to describe each memory
region individually, but did not include all the regions.

The result is that Linux fails to find the last regions, so extend the
definition to cover all the blocks.

This also corrects the related DeviceTree validation error.

Fixes: 74cf6675c35e ("arm64: dts: qcom: sc8180x: Fix LLCC reg property")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240525-sc8180x-llcc-reg-fixup-v1-1-0c13d4ea94f2@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index 0677123105602d42b9fb7430dafa21a776ed784e..581a70c34fd29e029b48860ad5b4b35d84942a26 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -2647,11 +2647,14 @@
 
                system-cache-controller@9200000 {
                        compatible = "qcom,sc8180x-llcc";
-                       reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>,
-                             <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>,
-                             <0 0x09600000 0 0x50000>;
+                       reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>,
+                             <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>,
+                             <0 0x09400000 0 0x58000>, <0 0x09480000 0 0x58000>,
+                             <0 0x09500000 0 0x58000>, <0 0x09580000 0 0x58000>,
+                             <0 0x09600000 0 0x58000>;
                        reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
-                                   "llcc3_base", "llcc_broadcast_base";
+                                   "llcc3_base", "llcc4_base", "llcc5_base",
+                                   "llcc6_base", "llcc7_base",  "llcc_broadcast_base";
                        interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
                };