]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
soundwire: amd: add soundwire host wake interrupt enable/disable sequence
authorVijendar Mukunda <Vijendar.Mukunda@amd.com>
Fri, 7 Feb 2025 06:58:41 +0000 (12:28 +0530)
committerVinod Koul <vkoul@kernel.org>
Thu, 13 Feb 2025 16:21:07 +0000 (21:51 +0530)
For wake event, SoundWire host wake interrupt will be asserted based on
below pre-conditions for ACP7.0 & ACP7.1 platforms.
- ACP device should be in D0 state.
- SoundWire manager instance should be in D3 state.
- SoundWire manager device state should be set to D3.
- ACP_PME_EN should be set to 1.

Implement code changes to enable/disable SoundWire host wake interrupt mask
during suspend and resume as per design flow for ACP7.0 & ACP7.1 platforms.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Link: https://lore.kernel.org/r/20250207065841.4718-7-Vijendar.Mukunda@amd.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/soundwire/amd_manager.c
drivers/soundwire/amd_manager.h

index 0fce876dcb4216df2a7785490bcf05e269f4655a..dcf85f94950a3130e469ccd26d615cf8c7395de1 100644 (file)
@@ -166,6 +166,34 @@ static int amd_sdw_set_device_state(struct amd_sdw_manager *amd_manager, u32 tar
        return 0;
 }
 
+static int amd_sdw_host_wake_enable(struct amd_sdw_manager *amd_manager, bool enable)
+{
+       u32 intr_cntl1;
+       u32 sdw_host_wake_irq_mask;
+
+       if (!amd_manager->wake_en_mask)
+               return 0;
+
+       switch (amd_manager->instance) {
+       case ACP_SDW0:
+               sdw_host_wake_irq_mask = AMD_SDW0_HOST_WAKE_INTR_MASK;
+               break;
+       case ACP_SDW1:
+               sdw_host_wake_irq_mask = AMD_SDW1_HOST_WAKE_INTR_MASK;
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       intr_cntl1 = readl(amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(ACP_SDW1));
+       if (enable)
+               intr_cntl1 |= sdw_host_wake_irq_mask;
+       else
+               intr_cntl1 &= ~sdw_host_wake_irq_mask;
+       writel(intr_cntl1, amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(ACP_SDW1));
+       return 0;
+}
+
 static void amd_sdw_ctl_word_prep(u32 *lower_word, u32 *upper_word, struct sdw_msg *msg,
                                  int cmd_offset)
 {
@@ -1182,11 +1210,21 @@ static int __maybe_unused amd_suspend(struct device *dev)
 
        if (amd_manager->power_mode_mask & AMD_SDW_CLK_STOP_MODE) {
                amd_sdw_wake_enable(amd_manager, false);
+               if (amd_manager->acp_rev >= ACP70_PCI_REV_ID) {
+                       ret = amd_sdw_host_wake_enable(amd_manager, false);
+                       if (ret)
+                               return ret;
+               }
                ret = amd_sdw_clock_stop(amd_manager);
                if (ret)
                        return ret;
        } else if (amd_manager->power_mode_mask & AMD_SDW_POWER_OFF_MODE) {
                amd_sdw_wake_enable(amd_manager, false);
+               if (amd_manager->acp_rev >= ACP70_PCI_REV_ID) {
+                       ret = amd_sdw_host_wake_enable(amd_manager, false);
+                       if (ret)
+                               return ret;
+               }
                /*
                 * As per hardware programming sequence on AMD platforms,
                 * clock stop should be invoked first before powering-off
@@ -1220,11 +1258,21 @@ static int __maybe_unused amd_suspend_runtime(struct device *dev)
        }
        if (amd_manager->power_mode_mask & AMD_SDW_CLK_STOP_MODE) {
                amd_sdw_wake_enable(amd_manager, true);
+               if (amd_manager->acp_rev >= ACP70_PCI_REV_ID) {
+                       ret = amd_sdw_host_wake_enable(amd_manager, true);
+                       if (ret)
+                               return ret;
+               }
                ret = amd_sdw_clock_stop(amd_manager);
                if (ret)
                        return ret;
        } else if (amd_manager->power_mode_mask & AMD_SDW_POWER_OFF_MODE) {
                amd_sdw_wake_enable(amd_manager, true);
+               if (amd_manager->acp_rev >= ACP70_PCI_REV_ID) {
+                       ret = amd_sdw_host_wake_enable(amd_manager, true);
+                       if (ret)
+                               return ret;
+               }
                ret = amd_sdw_clock_stop(amd_manager);
                if (ret)
                        return ret;
@@ -1265,8 +1313,18 @@ static int __maybe_unused amd_resume_runtime(struct device *dev)
                ret = amd_sdw_clock_stop_exit(amd_manager);
                if (ret)
                        return ret;
+               if (amd_manager->acp_rev >= ACP70_PCI_REV_ID) {
+                       ret = amd_sdw_host_wake_enable(amd_manager, false);
+                       if (ret)
+                               return ret;
+               }
        } else if (amd_manager->power_mode_mask & AMD_SDW_POWER_OFF_MODE) {
                writel(0x00, amd_manager->acp_mmio + ACP_SW_WAKE_EN(amd_manager->instance));
+               if (amd_manager->acp_rev >= ACP70_PCI_REV_ID) {
+                       ret = amd_sdw_host_wake_enable(amd_manager, false);
+                       if (ret)
+                               return ret;
+               }
                val = readl(amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL);
                if (val) {
                        val |= AMD_SDW_CLK_RESUME_REQ;
index 1d5e94371f813e67089b25cdb87400666233e37b..6cc916b0c820673bf76e70daa02bbb8eb0a0f8cc 100644 (file)
 #define AMD_SDW_CLK_RESUME_DONE                                3
 #define AMD_SDW_WAKE_STAT_MASK                         BIT(16)
 #define AMD_SDW_WAKE_INTR_MASK                         BIT(16)
+#define AMD_SDW0_HOST_WAKE_INTR_MASK                   BIT(22)
+#define AMD_SDW1_HOST_WAKE_INTR_MASK                   BIT(23)
 #define AMD_SDW_DEVICE_STATE                           0x1430
 #define AMD_SDW0_DEVICE_STATE_MASK                     GENMASK(1, 0)
 #define AMD_SDW1_DEVICE_STATE_MASK                     GENMASK(3, 2)