6.6-stable patches

added patches:
	x86-cpu-amd-prevent-improper-isolation-of-shared-resources-in-zen2-s-op-cache.patch

diff --git a/queue-6.6/series b/queue-6.6/series
index e9ec5f0760db770ea38bcfb84fccec18c63e7c75..78d6900c9020a61753cb3efecedd8770fd028b08 100644 (file)
--- a/queue-6.6/series
+++ b/queue-6.6/series
@@ -294,3 +294,4 @@ kvm-arm64-vgic-fix-iidr-revision-field-extracted-from-wrong-value.patch
 kvm-arm64-fix-initialisation-order-in-__pkvm_init_finalise.patch
 loongarch-fix-potential-ade-in-loongson_gpu_fixup_dma_hang.patch
 loongarch-use-per-root-bridge-pcih-flag-to-skip-mem-resource-fixup.patch
+x86-cpu-amd-prevent-improper-isolation-of-shared-resources-in-zen2-s-op-cache.patch

diff --git a/queue-6.6/x86-cpu-amd-prevent-improper-isolation-of-shared-resources-in-zen2-s-op-cache.patch b/queue-6.6/x86-cpu-amd-prevent-improper-isolation-of-shared-resources-in-zen2-s-op-cache.patch
new file mode 100644 (file)
index 0000000..2fedbb3
--- /dev/null
+++ b/queue-6.6/x86-cpu-amd-prevent-improper-isolation-of-shared-resources-in-zen2-s-op-cache.patch
@@ -0,0 +1,57 @@
+From f160936aec2e9f80000d7ea606501b1f68d05e15 Mon Sep 17 00:00:00 2001
+From: Prathyushi Nangia <prathyushi.nangia@amd.com>
+Date: Tue, 9 Dec 2025 10:01:33 -0600
+Subject: x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache
+
+From: Prathyushi Nangia <prathyushi.nangia@amd.com>
+
+commit c21b90f77687075115d989e53a8ec5e2bb427ab1 upstream.
+
+Make sure resources are not improperly shared in the op cache and
+cause instruction corruption this way.
+
+Signed-off-by: Prathyushi Nangia <prathyushi.nangia@amd.com>
+Co-developed-by: Borislav Petkov (AMD) <bp@alien8.de>
+Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/include/asm/msr-index.h       |    1 +
+ arch/x86/kernel/cpu/amd.c              |    3 +++
+ tools/arch/x86/include/asm/msr-index.h |    3 +++
+ 3 files changed, 7 insertions(+)
+
+--- a/arch/x86/include/asm/msr-index.h
++++ b/arch/x86/include/asm/msr-index.h
+@@ -675,6 +675,7 @@
+ /* Zen4 */
+ #define MSR_ZEN4_BP_CFG                       0xc001102e
+ #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
++#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT   33
+ 
+ /* Zen 2 */
+ #define MSR_ZEN2_SPECTRAL_CHICKEN     0xc00110e3
+--- a/arch/x86/kernel/cpu/amd.c
++++ b/arch/x86/kernel/cpu/amd.c
+@@ -1166,6 +1166,9 @@ static void init_amd_zen2(struct cpuinfo
+               msr_clear_bit(MSR_AMD64_CPUID_FN_7, 18);
+               pr_emerg("RDSEED is not reliable on this platform; disabling.\n");
+       }
++
++      if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
++              msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
+ }
+ 
+ static void init_amd_zen3(struct cpuinfo_x86 *c)
+--- a/tools/arch/x86/include/asm/msr-index.h
++++ b/tools/arch/x86/include/asm/msr-index.h
+@@ -638,6 +638,9 @@
+ /* AMD Last Branch Record MSRs */
+ #define MSR_AMD64_LBR_SELECT                  0xc000010e
+ 
++#define MSR_ZEN4_BP_CFG                       0xc001102e
++#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT   33
++
+ /* Fam 17h MSRs */
+ #define MSR_F17H_IRPERF                       0xc00000e9
+