]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/i915/cdclk: abstract intel_cdclk_bw_min_cdclk()
authorJani Nikula <jani.nikula@intel.com>
Wed, 25 Jun 2025 10:32:29 +0000 (13:32 +0300)
committerJani Nikula <jani.nikula@intel.com>
Thu, 26 Jun 2025 08:55:54 +0000 (11:55 +0300)
Add intel_cdclk_bw_min_cdclk() helper to avoid looking at struct
intel_cdclk_state internals outside of intel_cdclk.c.

Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://lore.kernel.org/r/d07499174ebe55fa8fb98d4cb5ff541b6f5ec95b.1750847509.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_bw.c
drivers/gpu/drm/i915/display/intel_cdclk.c
drivers/gpu/drm/i915/display/intel_cdclk.h

index 5942a3bae32c34884a506648d5f4db2d7a0e803c..d29a755612deff2a95f50989d95b042cc7909cee 100644 (file)
@@ -1468,12 +1468,12 @@ int intel_bw_calc_min_cdclk(struct intel_atomic_state *state,
         * requirements. This can reduce back and forth
         * display blinking due to constant cdclk changes.
         */
-       if (new_min_cdclk <= cdclk_state->bw_min_cdclk)
+       if (new_min_cdclk <= intel_cdclk_bw_min_cdclk(cdclk_state))
                return 0;
 
        drm_dbg_kms(display->drm,
                    "new bandwidth min cdclk (%d kHz) > old min cdclk (%d kHz)\n",
-                   new_min_cdclk, cdclk_state->bw_min_cdclk);
+                   new_min_cdclk, intel_cdclk_bw_min_cdclk(cdclk_state));
        *need_cdclk_calc = true;
 
        return 0;
index 1fc82844458b8e26fca0223d8fffb2708aca8fa2..baec4042e4b6687b7b1bc84440b687df82ac39c1 100644 (file)
@@ -3844,3 +3844,8 @@ int intel_cdclk_min_cdclk(const struct intel_cdclk_state *cdclk_state, enum pipe
 {
        return cdclk_state->min_cdclk[pipe];
 }
+
+int intel_cdclk_bw_min_cdclk(const struct intel_cdclk_state *cdclk_state)
+{
+       return cdclk_state->bw_min_cdclk;
+}
index ef6ad9d04c200a859cee4a84339bcb25d7440a11..fe1a1f1c19002acb895cccfe4d0c05afb2f8c5fd 100644 (file)
@@ -99,5 +99,6 @@ void intel_cdclk_debugfs_register(struct intel_display *display);
 
 int intel_cdclk_logical(const struct intel_cdclk_state *cdclk_state);
 int intel_cdclk_min_cdclk(const struct intel_cdclk_state *cdclk_state, enum pipe pipe);
+int intel_cdclk_bw_min_cdclk(const struct intel_cdclk_state *cdclk_state);
 
 #endif /* __INTEL_CDCLK_H__ */