--- /dev/null
+From f62f5eff3d40a56ad1cf0d81a6cac8dd8743e8a1 Mon Sep 17 00:00:00 2001
+From: Takashi Iwai <tiwai@suse.de>
+Date: Tue, 9 Dec 2014 19:58:53 +0100
+Subject: ALSA: hda - Add EAPD fixup for ASUS Z99He laptop
+
+From: Takashi Iwai <tiwai@suse.de>
+
+commit f62f5eff3d40a56ad1cf0d81a6cac8dd8743e8a1 upstream.
+
+The same fixup to enable EAPD is needed for ASUS Z99He with AD1986A
+codec like another ASUS machine.
+
+Reported-and-tested-by: Dmitry V. Zimin <pfzim@mail.ru>
+Signed-off-by: Takashi Iwai <tiwai@suse.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ sound/pci/hda/patch_analog.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/sound/pci/hda/patch_analog.c
++++ b/sound/pci/hda/patch_analog.c
+@@ -333,6 +333,7 @@ static const struct hda_fixup ad1986a_fi
+
+ static const struct snd_pci_quirk ad1986a_fixup_tbl[] = {
+ SND_PCI_QUIRK(0x103c, 0x30af, "HP B2800", AD1986A_FIXUP_LAPTOP_IMIC),
++ SND_PCI_QUIRK(0x1043, 0x1443, "ASUS Z99He", AD1986A_FIXUP_EAPD),
+ SND_PCI_QUIRK(0x1043, 0x1447, "ASUS A8JN", AD1986A_FIXUP_EAPD),
+ SND_PCI_QUIRK_MASK(0x1043, 0xff00, 0x8100, "ASUS P5", AD1986A_FIXUP_3STACK),
+ SND_PCI_QUIRK_MASK(0x1043, 0xff00, 0x8200, "ASUS M2", AD1986A_FIXUP_3STACK),
--- /dev/null
+From fedb2245cbb8d823e449ebdd48ba9bb35c071ce0 Mon Sep 17 00:00:00 2001
+From: Takashi Iwai <tiwai@suse.de>
+Date: Thu, 13 Nov 2014 07:11:38 +0100
+Subject: ALSA: hda - Fix built-in mic at resume on Lenovo Ideapad S210
+
+From: Takashi Iwai <tiwai@suse.de>
+
+commit fedb2245cbb8d823e449ebdd48ba9bb35c071ce0 upstream.
+
+The built-in mic boost volume gets almost muted after suspend/resume
+on Lenovo Ideapad S210.
+
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=88121
+Reported-and-tested-by: Roman Kagan <rkagan@mail.ru>
+Signed-off-by: Takashi Iwai <tiwai@suse.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ sound/pci/hda/patch_realtek.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/sound/pci/hda/patch_realtek.c
++++ b/sound/pci/hda/patch_realtek.c
+@@ -4554,6 +4554,7 @@ static const struct snd_pci_quirk alc269
+ SND_PCI_QUIRK(0x17aa, 0x2212, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
+ SND_PCI_QUIRK(0x17aa, 0x2214, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
+ SND_PCI_QUIRK(0x17aa, 0x2215, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
++ SND_PCI_QUIRK(0x17aa, 0x3977, "IdeaPad S210", ALC283_FIXUP_INT_MIC),
+ SND_PCI_QUIRK(0x17aa, 0x3978, "IdeaPad Y410P", ALC269_FIXUP_NO_SHUTUP),
+ SND_PCI_QUIRK(0x17aa, 0x5013, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
+ SND_PCI_QUIRK(0x17aa, 0x501a, "Thinkpad", ALC283_FIXUP_INT_MIC),
--- /dev/null
+From 66139a48cee1530c91f37c145384b4ee7043f0b7 Mon Sep 17 00:00:00 2001
+From: Takashi Iwai <tiwai@suse.de>
+Date: Sat, 6 Dec 2014 18:02:55 +0100
+Subject: ALSA: usb-audio: Don't resubmit pending URBs at MIDI error recovery
+
+From: Takashi Iwai <tiwai@suse.de>
+
+commit 66139a48cee1530c91f37c145384b4ee7043f0b7 upstream.
+
+In snd_usbmidi_error_timer(), the driver tries to resubmit MIDI input
+URBs to reactivate the MIDI stream, but this causes the error when
+some of URBs are still pending like:
+
+ WARNING: CPU: 0 PID: 0 at ../drivers/usb/core/urb.c:339 usb_submit_urb+0x5f/0x70()
+ URB ef705c40 submitted while active
+ CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.16.6-2-desktop #1
+ Hardware name: FOXCONN TPS01/TPS01, BIOS 080015 03/23/2010
+ c0984bfa f4009ed4 c078deaf f4009ee4 c024c884 c09a135c f4009f00 00000000
+ c0984bfa 00000153 c061ac4f c061ac4f 00000009 00000001 ef705c40 e854d1c0
+ f4009eec c024c8d3 00000009 f4009ee4 c09a135c f4009f00 f4009f04 c061ac4f
+ Call Trace:
+ [<c0205df6>] try_stack_unwind+0x156/0x170
+ [<c020482a>] dump_trace+0x5a/0x1b0
+ [<c0205e56>] show_trace_log_lvl+0x46/0x50
+ [<c02049d1>] show_stack_log_lvl+0x51/0xe0
+ [<c0205eb7>] show_stack+0x27/0x50
+ [<c078deaf>] dump_stack+0x45/0x65
+ [<c024c884>] warn_slowpath_common+0x84/0xa0
+ [<c024c8d3>] warn_slowpath_fmt+0x33/0x40
+ [<c061ac4f>] usb_submit_urb+0x5f/0x70
+ [<f7974104>] snd_usbmidi_submit_urb+0x14/0x60 [snd_usbmidi_lib]
+ [<f797483a>] snd_usbmidi_error_timer+0x6a/0xa0 [snd_usbmidi_lib]
+ [<c02570c0>] call_timer_fn+0x30/0x130
+ [<c0257442>] run_timer_softirq+0x1c2/0x260
+ [<c0251493>] __do_softirq+0xc3/0x270
+ [<c0204732>] do_softirq_own_stack+0x22/0x30
+ [<c025186d>] irq_exit+0x8d/0xa0
+ [<c0795228>] smp_apic_timer_interrupt+0x38/0x50
+ [<c0794a3c>] apic_timer_interrupt+0x34/0x3c
+ [<c0673d9e>] cpuidle_enter_state+0x3e/0xd0
+ [<c028bb8d>] cpu_idle_loop+0x29d/0x3e0
+ [<c028bd23>] cpu_startup_entry+0x53/0x60
+ [<c0bfac1e>] start_kernel+0x415/0x41a
+
+For avoiding these errors, check the pending URBs and skip
+resubmitting such ones.
+
+Reported-and-tested-by: Stefan Seyfried <stefan.seyfried@googlemail.com>
+Acked-by: Clemens Ladisch <clemens@ladisch.de>
+Signed-off-by: Takashi Iwai <tiwai@suse.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ sound/usb/midi.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/sound/usb/midi.c
++++ b/sound/usb/midi.c
+@@ -364,6 +364,8 @@ static void snd_usbmidi_error_timer(unsi
+ if (in && in->error_resubmit) {
+ in->error_resubmit = 0;
+ for (j = 0; j < INPUT_URBS; ++j) {
++ if (atomic_read(&in->urbs[j]->use_count))
++ continue;
+ in->urbs[j]->dev = umidi->dev;
+ snd_usbmidi_submit_urb(in->urbs[j], GFP_ATOMIC);
+ }
--- /dev/null
+From aec653c43b0c55667355e26d7de1236bda9fb4e3 Mon Sep 17 00:00:00 2001
+From: Todd Fujinaka <todd.fujinaka@intel.com>
+Date: Tue, 17 Jun 2014 06:58:11 +0000
+Subject: igb: bring link up when PHY is powered up
+
+From: Todd Fujinaka <todd.fujinaka@intel.com>
+
+commit aec653c43b0c55667355e26d7de1236bda9fb4e3 upstream.
+
+Call igb_setup_link() when the PHY is powered up.
+
+Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
+Reported-by: Jeff Westfahl <jeff.westfahl@ni.com>
+Tested-by: Aaron Brown <aaron.f.brown@intel.com>
+Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
+Cc: Vincent Donnefort <vdonnefort@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/ethernet/intel/igb/igb_main.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/net/ethernet/intel/igb/igb_main.c
++++ b/drivers/net/ethernet/intel/igb/igb_main.c
+@@ -1613,6 +1613,8 @@ void igb_power_up_link(struct igb_adapte
+ igb_power_up_phy_copper(&adapter->hw);
+ else
+ igb_power_up_serdes_link_82575(&adapter->hw);
++
++ igb_setup_link(&adapter->hw);
+ }
+
+ /**
--- /dev/null
+From 4f031fa9f188b2b0641ac20087d9e16bcfb4e49d Mon Sep 17 00:00:00 2001
+From: Ronald Wahl <ronald.wahl@raritan.com>
+Date: Thu, 6 Nov 2014 11:52:13 +0100
+Subject: mac80211: Fix regression that triggers a kernel BUG with CCMP
+
+From: Ronald Wahl <ronald.wahl@raritan.com>
+
+commit 4f031fa9f188b2b0641ac20087d9e16bcfb4e49d upstream.
+
+Commit 7ec7c4a9a686c608315739ab6a2b0527a240883c (mac80211: port CCMP to
+cryptoapi's CCM driver) introduced a regression when decrypting empty
+packets (data_len == 0). This will lead to backtraces like:
+
+(scatterwalk_start) from [<c01312f4>] (scatterwalk_map_and_copy+0x2c/0xa8)
+(scatterwalk_map_and_copy) from [<c013a5a0>] (crypto_ccm_decrypt+0x7c/0x25c)
+(crypto_ccm_decrypt) from [<c032886c>] (ieee80211_aes_ccm_decrypt+0x160/0x170)
+(ieee80211_aes_ccm_decrypt) from [<c031c628>] (ieee80211_crypto_ccmp_decrypt+0x1ac/0x238)
+(ieee80211_crypto_ccmp_decrypt) from [<c032ef28>] (ieee80211_rx_handlers+0x870/0x1d24)
+(ieee80211_rx_handlers) from [<c0330c7c>] (ieee80211_prepare_and_rx_handle+0x8a0/0x91c)
+(ieee80211_prepare_and_rx_handle) from [<c0331260>] (ieee80211_rx+0x568/0x730)
+(ieee80211_rx) from [<c01d3054>] (__carl9170_rx+0x94c/0xa20)
+(__carl9170_rx) from [<c01d3324>] (carl9170_rx_stream+0x1fc/0x320)
+(carl9170_rx_stream) from [<c01cbccc>] (carl9170_usb_tasklet+0x80/0xc8)
+(carl9170_usb_tasklet) from [<c00199dc>] (tasklet_hi_action+0x88/0xcc)
+(tasklet_hi_action) from [<c00193c8>] (__do_softirq+0xcc/0x200)
+(__do_softirq) from [<c0019734>] (irq_exit+0x80/0xe0)
+(irq_exit) from [<c0009c10>] (handle_IRQ+0x64/0x80)
+(handle_IRQ) from [<c000c3a0>] (__irq_svc+0x40/0x4c)
+(__irq_svc) from [<c0009d44>] (arch_cpu_idle+0x2c/0x34)
+
+Such packets can appear for example when using the carl9170 wireless driver
+because hardware sometimes generates garbage when the internal FIFO overruns.
+
+This patch adds an additional length check.
+
+Fixes: 7ec7c4a9a686 ("mac80211: port CCMP to cryptoapi's CCM driver")
+Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+Signed-off-by: Ronald Wahl <ronald.wahl@raritan.com>
+Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+
+---
+ net/mac80211/aes_ccm.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/net/mac80211/aes_ccm.c
++++ b/net/mac80211/aes_ccm.c
+@@ -54,6 +54,9 @@ int ieee80211_aes_ccm_decrypt(struct cry
+
+ memset(&aead_req, 0, sizeof(aead_req));
+
++ if (data_len == 0)
++ return -EINVAL;
++
+ sg_init_one(&pt, data, data_len);
+ sg_init_one(&assoc, &aad[2], be16_to_cpup((__be16 *)aad));
+ sg_init_table(ct, 2);
--- /dev/null
+From 338b522ca43cfd32d11a370f4203bcd089c6c877 Mon Sep 17 00:00:00 2001
+From: Kan Liang <kan.liang@intel.com>
+Date: Mon, 14 Jul 2014 12:25:56 -0700
+Subject: perf/x86/intel: Protect LBR and extra_regs against KVM lying
+
+From: Kan Liang <kan.liang@intel.com>
+
+commit 338b522ca43cfd32d11a370f4203bcd089c6c877 upstream.
+
+With -cpu host, KVM reports LBR and extra_regs support, if the host has
+support.
+
+When the guest perf driver tries to access LBR or extra_regs MSR,
+it #GPs all MSR accesses,since KVM doesn't handle LBR and extra_regs support.
+So check the related MSRs access right once at initialization time to avoid
+the error access at runtime.
+
+For reproducing the issue, please build the kernel with CONFIG_KVM_INTEL = y
+(for host kernel).
+And CONFIG_PARAVIRT = n and CONFIG_KVM_GUEST = n (for guest kernel).
+Start the guest with -cpu host.
+Run perf record with --branch-any or --branch-filter in guest to trigger LBR
+Run perf stat offcore events (E.g. LLC-loads/LLC-load-misses ...) in guest to
+trigger offcore_rsp #GP
+
+Signed-off-by: Kan Liang <kan.liang@intel.com>
+Signed-off-by: Peter Zijlstra <peterz@infradead.org>
+Cc: Andi Kleen <ak@linux.intel.com>
+Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
+Cc: Linus Torvalds <torvalds@linux-foundation.org>
+Cc: Maria Dimakopoulou <maria.n.dimakopoulou@gmail.com>
+Cc: Mark Davies <junk@eslaf.co.uk>
+Cc: Paul Mackerras <paulus@samba.org>
+Cc: Stephane Eranian <eranian@google.com>
+Cc: Yan, Zheng <zheng.z.yan@intel.com>
+Link: http://lkml.kernel.org/r/1405365957-20202-1-git-send-email-kan.liang@intel.com
+Signed-off-by: Ingo Molnar <mingo@kernel.org>
+Cc: Dongsu Park <dongsu.park@profitbricks.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/kernel/cpu/perf_event.c | 3 +
+ arch/x86/kernel/cpu/perf_event.h | 12 +++---
+ arch/x86/kernel/cpu/perf_event_intel.c | 66 ++++++++++++++++++++++++++++++++-
+ 3 files changed, 75 insertions(+), 6 deletions(-)
+
+--- a/arch/x86/kernel/cpu/perf_event.c
++++ b/arch/x86/kernel/cpu/perf_event.c
+@@ -118,6 +118,9 @@ static int x86_pmu_extra_regs(u64 config
+ continue;
+ if (event->attr.config1 & ~er->valid_mask)
+ return -EINVAL;
++ /* Check if the extra msrs can be safely accessed*/
++ if (!er->extra_msr_access)
++ return -ENXIO;
+
+ reg->idx = er->idx;
+ reg->config = event->attr.config1;
+--- a/arch/x86/kernel/cpu/perf_event.h
++++ b/arch/x86/kernel/cpu/perf_event.h
+@@ -293,14 +293,16 @@ struct extra_reg {
+ u64 config_mask;
+ u64 valid_mask;
+ int idx; /* per_xxx->regs[] reg index */
++ bool extra_msr_access;
+ };
+
+ #define EVENT_EXTRA_REG(e, ms, m, vm, i) { \
+- .event = (e), \
+- .msr = (ms), \
+- .config_mask = (m), \
+- .valid_mask = (vm), \
+- .idx = EXTRA_REG_##i, \
++ .event = (e), \
++ .msr = (ms), \
++ .config_mask = (m), \
++ .valid_mask = (vm), \
++ .idx = EXTRA_REG_##i, \
++ .extra_msr_access = true, \
+ }
+
+ #define INTEL_EVENT_EXTRA_REG(event, msr, vm, idx) \
+--- a/arch/x86/kernel/cpu/perf_event_intel.c
++++ b/arch/x86/kernel/cpu/perf_event_intel.c
+@@ -2183,6 +2183,41 @@ static void intel_snb_check_microcode(vo
+ }
+ }
+
++/*
++ * Under certain circumstances, access certain MSR may cause #GP.
++ * The function tests if the input MSR can be safely accessed.
++ */
++static bool check_msr(unsigned long msr, u64 mask)
++{
++ u64 val_old, val_new, val_tmp;
++
++ /*
++ * Read the current value, change it and read it back to see if it
++ * matches, this is needed to detect certain hardware emulators
++ * (qemu/kvm) that don't trap on the MSR access and always return 0s.
++ */
++ if (rdmsrl_safe(msr, &val_old))
++ return false;
++
++ /*
++ * Only change the bits which can be updated by wrmsrl.
++ */
++ val_tmp = val_old ^ mask;
++ if (wrmsrl_safe(msr, val_tmp) ||
++ rdmsrl_safe(msr, &val_new))
++ return false;
++
++ if (val_new != val_tmp)
++ return false;
++
++ /* Here it's sure that the MSR can be safely accessed.
++ * Restore the old value and return.
++ */
++ wrmsrl(msr, val_old);
++
++ return true;
++}
++
+ static __init void intel_sandybridge_quirk(void)
+ {
+ x86_pmu.check_microcode = intel_snb_check_microcode;
+@@ -2272,7 +2307,8 @@ __init int intel_pmu_init(void)
+ union cpuid10_ebx ebx;
+ struct event_constraint *c;
+ unsigned int unused;
+- int version;
++ struct extra_reg *er;
++ int version, i;
+
+ if (!cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) {
+ switch (boot_cpu_data.x86) {
+@@ -2578,6 +2614,34 @@ __init int intel_pmu_init(void)
+ }
+ }
+
++ /*
++ * Access LBR MSR may cause #GP under certain circumstances.
++ * E.g. KVM doesn't support LBR MSR
++ * Check all LBT MSR here.
++ * Disable LBR access if any LBR MSRs can not be accessed.
++ */
++ if (x86_pmu.lbr_nr && !check_msr(x86_pmu.lbr_tos, 0x3UL))
++ x86_pmu.lbr_nr = 0;
++ for (i = 0; i < x86_pmu.lbr_nr; i++) {
++ if (!(check_msr(x86_pmu.lbr_from + i, 0xffffUL) &&
++ check_msr(x86_pmu.lbr_to + i, 0xffffUL)))
++ x86_pmu.lbr_nr = 0;
++ }
++
++ /*
++ * Access extra MSR may cause #GP under certain circumstances.
++ * E.g. KVM doesn't support offcore event
++ * Check all extra_regs here.
++ */
++ if (x86_pmu.extra_regs) {
++ for (er = x86_pmu.extra_regs; er->msr; er++) {
++ er->extra_msr_access = check_msr(er->msr, 0x1ffUL);
++ /* Disable LBR select mapping */
++ if ((er->idx == EXTRA_REG_LBR) && !er->extra_msr_access)
++ x86_pmu.lbr_sel_map = NULL;
++ }
++ }
++
+ /* Support full width counters using alternative MSR range */
+ if (x86_pmu.intel_cap.full_width_write) {
+ x86_pmu.max_period = x86_pmu.cntval_mask;
--- /dev/null
+From 152d44a853e42952f6c8a504fb1f8eefd21fd5fd Mon Sep 17 00:00:00 2001
+From: Anton Blanchard <anton@samba.org>
+Date: Thu, 27 Nov 2014 08:11:28 +1100
+Subject: powerpc: 32 bit getcpu VDSO function uses 64 bit instructions
+
+From: Anton Blanchard <anton@samba.org>
+
+commit 152d44a853e42952f6c8a504fb1f8eefd21fd5fd upstream.
+
+I used some 64 bit instructions when adding the 32 bit getcpu VDSO
+function. Fix it.
+
+Fixes: 18ad51dd342a ("powerpc: Add VDSO version of getcpu")
+Signed-off-by: Anton Blanchard <anton@samba.org>
+Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/powerpc/kernel/vdso32/getcpu.S | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/powerpc/kernel/vdso32/getcpu.S
++++ b/arch/powerpc/kernel/vdso32/getcpu.S
+@@ -30,8 +30,8 @@
+ V_FUNCTION_BEGIN(__kernel_getcpu)
+ .cfi_startproc
+ mfspr r5,SPRN_USPRG3
+- cmpdi cr0,r3,0
+- cmpdi cr1,r4,0
++ cmpwi cr0,r3,0
++ cmpwi cr1,r4,0
+ clrlwi r6,r5,16
+ rlwinm r7,r5,16,31-15,31-0
+ beq cr0,1f
net-mvneta-fix-tx-interrupt-delay.patch
net-mvneta-fix-race-condition-in-mvneta_tx.patch
net-sctp-use-max_header-for-headroom-reserve-in-output-path.patch
+perf-x86-intel-protect-lbr-and-extra_regs-against-kvm-lying.patch
+igb-bring-link-up-when-phy-is-powered-up.patch
+powerpc-32-bit-getcpu-vdso-function-uses-64-bit-instructions.patch
+mac80211-fix-regression-that-triggers-a-kernel-bug-with-ccmp.patch
+alsa-hda-add-eapd-fixup-for-asus-z99he-laptop.patch
+alsa-hda-fix-built-in-mic-at-resume-on-lenovo-ideapad-s210.patch
+alsa-usb-audio-don-t-resubmit-pending-urbs-at-midi-error-recovery.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
