rs6000: Delete RS6000_CONSTRAINT_f

Constraint "f" is always exactly the same as constraint "d", so we do
not need RS6000_CONSTRAINT_f.

2022-05-11  Segher Boessenkool  <segher@kernel.crashing.org>

	* config/rs6000/constraints.md (register_constraint "f"): Use
	RS6000_CONSTRAINT_d.
	* config/rs6000/rs6000.cc (rs6000_debug_reg_global): Do not handle
	RS6000_CONSTRAINT_f.
	(rs6000_init_hard_regno_mode_ok): Ditto.  Reorder and simplify a bit.
	* config/rs6000/rs6000.h (r6000_reg_class_enum): Delete
	RS6000_CONSTRAINT_d.

diff --git a/gcc/config/rs6000/constraints.md b/gcc/config/rs6000/constraints.md
index b361893e289e7492e8b4c3cf7f48be2c042c516c..5a44a92142e5eb396de56eacfd489064d012a629 100644 (file)
--- a/gcc/config/rs6000/constraints.md
+++ b/gcc/config/rs6000/constraints.md
@@ -29,7 +29,7 @@
   "A base register.  Like @code{r}, but @code{r0} is not allowed, so
    @code{r1}@dots{}@code{r31}.")
 
-(define_register_constraint "f" "rs6000_constraints[RS6000_CONSTRAINT_f]"
+(define_register_constraint "f" "rs6000_constraints[RS6000_CONSTRAINT_d]"
   "A floating point register (FPR), @code{f0}@dots{}@code{f31}.")
 
 (define_register_constraint "d" "rs6000_constraints[RS6000_CONSTRAINT_d]"

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 4030864aa1afa4f1334dc1fa65940617b86aefe5..5cb8a53e9ce6f4d9ead1ca413b07f86caaec4877 100644 (file)
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -2305,7 +2305,6 @@ rs6000_debug_reg_global (void)
   fprintf (stderr,
           "\n"
           "d  reg_class = %s\n"
-          "f  reg_class = %s\n"
           "v  reg_class = %s\n"
           "wa reg_class = %s\n"
           "we reg_class = %s\n"
@@ -2314,7 +2313,6 @@ rs6000_debug_reg_global (void)
           "wA reg_class = %s\n"
           "\n",
           reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_d]],
-          reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_f]],
           reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_v]],
           reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wa]],
           reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_we]],
@@ -2953,7 +2951,6 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p)
      constraints are:
 
        d  - Register class to use with traditional DFmode instructions.
-       f  - Register class to use with traditional SFmode instructions.
        v  - Altivec register.
        wa - Any VSX register.
        wc - Reserved to represent individual CR bits (used in LLVM).
@@ -2962,18 +2959,11 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p)
        wx - Float register if we can do 32-bit int stores.  */
 
   if (TARGET_HARD_FLOAT)
-    {
-      rs6000_constraints[RS6000_CONSTRAINT_f] = FLOAT_REGS;    /* SFmode  */
-      rs6000_constraints[RS6000_CONSTRAINT_d] = FLOAT_REGS;    /* DFmode  */
-    }
-
-  if (TARGET_VSX)
-    rs6000_constraints[RS6000_CONSTRAINT_wa] = VSX_REGS;
-
-  /* Add conditional constraints based on various options, to allow us to
-     collapse multiple insn patterns.  */
+    rs6000_constraints[RS6000_CONSTRAINT_d] = FLOAT_REGS;
   if (TARGET_ALTIVEC)
     rs6000_constraints[RS6000_CONSTRAINT_v] = ALTIVEC_REGS;
+  if (TARGET_VSX)
+    rs6000_constraints[RS6000_CONSTRAINT_wa] = VSX_REGS;
 
   if (TARGET_POWERPC64)
     {

diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 523256a5c9d5c47f5f76f148fd2cf80aa6913cf6..20b9d11424db8dba2a5ac74144ce537134cf4337 100644 (file)
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -1240,8 +1240,7 @@ extern enum reg_class rs6000_regno_regclass[FIRST_PSEUDO_REGISTER];
 /* Register classes for various constraints that are based on the target
    switches.  */
 enum r6000_reg_class_enum {
-  RS6000_CONSTRAINT_d,         /* fpr registers for double values */
-  RS6000_CONSTRAINT_f,         /* fpr registers for single values */
+  RS6000_CONSTRAINT_d,         /* FPR registers */
   RS6000_CONSTRAINT_v,         /* Altivec registers */
   RS6000_CONSTRAINT_wa,                /* Any VSX register */
   RS6000_CONSTRAINT_we,                /* VSX register if ISA 3.0 vector. */