]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/amdgpu/mes: add missing locking in helper functions
authorAlex Deucher <alexander.deucher@amd.com>
Mon, 19 May 2025 19:46:25 +0000 (15:46 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 29 May 2025 14:58:10 +0000 (10:58 -0400)
We need to take the MES lock.

Reviewed-by: Michael Chen <michael.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

index 2febb63ab2322668d41e1c899a2919110c99f127..fe772c380120cbbad2711198ea6a3162a9d2c061 100644 (file)
@@ -300,7 +300,9 @@ int amdgpu_mes_map_legacy_queue(struct amdgpu_device *adev,
        queue_input.mqd_addr = amdgpu_bo_gpu_offset(ring->mqd_obj);
        queue_input.wptr_addr = ring->wptr_gpu_addr;
 
+       amdgpu_mes_lock(&adev->mes);
        r = adev->mes.funcs->map_legacy_queue(&adev->mes, &queue_input);
+       amdgpu_mes_unlock(&adev->mes);
        if (r)
                DRM_ERROR("failed to map legacy queue\n");
 
@@ -323,7 +325,9 @@ int amdgpu_mes_unmap_legacy_queue(struct amdgpu_device *adev,
        queue_input.trail_fence_addr = gpu_addr;
        queue_input.trail_fence_data = seq;
 
+       amdgpu_mes_lock(&adev->mes);
        r = adev->mes.funcs->unmap_legacy_queue(&adev->mes, &queue_input);
+       amdgpu_mes_unlock(&adev->mes);
        if (r)
                DRM_ERROR("failed to unmap legacy queue\n");
 
@@ -353,7 +357,9 @@ int amdgpu_mes_reset_legacy_queue(struct amdgpu_device *adev,
        if (ring->funcs->type == AMDGPU_RING_TYPE_GFX)
                queue_input.legacy_gfx = true;
 
+       amdgpu_mes_lock(&adev->mes);
        r = adev->mes.funcs->reset_hw_queue(&adev->mes, &queue_input);
+       amdgpu_mes_unlock(&adev->mes);
        if (r)
                DRM_ERROR("failed to reset legacy queue\n");
 
@@ -383,7 +389,9 @@ uint32_t amdgpu_mes_rreg(struct amdgpu_device *adev, uint32_t reg)
                goto error;
        }
 
+       amdgpu_mes_lock(&adev->mes);
        r = adev->mes.funcs->misc_op(&adev->mes, &op_input);
+       amdgpu_mes_unlock(&adev->mes);
        if (r)
                dev_err(adev->dev, "failed to read reg (0x%x)\n", reg);
        else
@@ -411,7 +419,9 @@ int amdgpu_mes_wreg(struct amdgpu_device *adev,
                goto error;
        }
 
+       amdgpu_mes_lock(&adev->mes);
        r = adev->mes.funcs->misc_op(&adev->mes, &op_input);
+       amdgpu_mes_unlock(&adev->mes);
        if (r)
                dev_err(adev->dev, "failed to write reg (0x%x)\n", reg);
 
@@ -438,7 +448,9 @@ int amdgpu_mes_reg_write_reg_wait(struct amdgpu_device *adev,
                goto error;
        }
 
+       amdgpu_mes_lock(&adev->mes);
        r = adev->mes.funcs->misc_op(&adev->mes, &op_input);
+       amdgpu_mes_unlock(&adev->mes);
        if (r)
                dev_err(adev->dev, "failed to reg_write_reg_wait\n");
 
@@ -463,7 +475,9 @@ int amdgpu_mes_reg_wait(struct amdgpu_device *adev, uint32_t reg,
                goto error;
        }
 
+       amdgpu_mes_lock(&adev->mes);
        r = adev->mes.funcs->misc_op(&adev->mes, &op_input);
+       amdgpu_mes_unlock(&adev->mes);
        if (r)
                dev_err(adev->dev, "failed to reg_write_reg_wait\n");
 
@@ -694,7 +708,9 @@ static int amdgpu_mes_set_enforce_isolation(struct amdgpu_device *adev,
                goto error;
        }
 
+       amdgpu_mes_lock(&adev->mes);
        r = adev->mes.funcs->misc_op(&adev->mes, &op_input);
+       amdgpu_mes_unlock(&adev->mes);
        if (r)
                dev_err(adev->dev, "failed to change_config.\n");